56F8000 datasheet(39/164 Pages) FREESCALE

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Program Map

56F8036 Data Sheet, Rev. 3

Freescale Semiconductor

Preliminary

4.3 Program Map

The Program Memory map is shown in Table 4-3.

ADC

0-2

P:$78

ADC Zero Crossing or Limit Error

PWM

0-2

P:$7A

Reload PWM

PWM

0-2

P:$7C

PWM Fault

SWILP

-1

P:$7E

SW Interrupt Low Priority

1. Two words are allocated for each entry in the vector table. This does not allow the full address range to be referenced

from the vector table, providing only 19 bits of address.

2. If the VBA is set to $0000, the first two locations of the vector table will overlay the chip reset addresses since the reset

address would match the base of this vector table.

Table 4-3 Program Memory Map1 at Reset

1. All addresses are 16-bit Word addresses.

Begin/End Address

Memory Allocation

P: $1F FFFF

P: $00 8800

RESERVED

P: $00 87FF

P: $00 8000

On-Chip RAM2

8KB

2. This RAM is shared with Data space starting at address X: $00 0000; see Figure 4-1.

P: $00 7FFF

P: $00 0000

Internal Program Flash

64KB

Cop Reset Address = $00 0002

Boot Location = $00 0000

Table 4-2 Interrupt Vector Table Contents1 (Continued)

Peripheral

Vector

Number

Priority

Level

Vector Base

Address +

Interrupt Function

56F8000 Datasheet(PDF) 39 Page - Freescale Semiconductor, Inc

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