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56F8335 Datasheet(PDF) 139 Page - Freescale Semiconductor, Inc |
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56F8335 Datasheet(HTML) 139 Page - Freescale Semiconductor, Inc |
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139 / 160 page  Serial Peripheral Interface (SPI) Timing 56F8335 Technical Data, Rev. 5 Freescale Semiconductor 139 Preliminary Figure 10-9 SPI Master Timing (CPHA = 0) Data invalid Master Slave tDI 0 0 — — ns ns 10-9, 10-10, 10-11 Rise time Master Slave tR — — 11.5 10.0 ns ns 10-9, 10-10, 10-11, 10-12 Fall time Master Slave tF — — 9.7 9.0 ns ns 10-9, 10-10, 10-11, 10-12 1. Parameters listed are guaranteed by design. Table 10-17 SPI Timing1 (Continued) Characteristic Symbol Min Max Unit See Figure SCLK (CPOL = 0) (Output) SCLK (CPOL = 1) (Output) MISO (Input) MOSI (Output) MSB in Bits 14–1 LSB in tF tC tCL tCL tR tR tF tDS tDH tCH tDI tDV tDI(ref) tR Master MSB out Bits 14–1 Master LSB out SS (Input) tCH SS is held High on master tF |
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