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56F8335 Datasheet(PDF) 150 Page - Freescale Semiconductor, Inc |
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56F8335 Datasheet(HTML) 150 Page - Freescale Semiconductor, Inc |
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150 / 160 page ![]() 56F8335 Technical Data, Rev. 5 150 Freescale Semiconductor Preliminary C, the internal [dynamic component], is classic C*V2*F CMOS power dissipation corresponding to the 56800E core and standard cell logic. D, the external [dynamic component], reflects power dissipated on-chip as a result of capacitive loading on the external pins of the chip. This is also commonly described as C*V2*F, although simulations on two of the IO cell types used on the device reveal that the power-versus-load curve does have a non-zero Y-intercept. Table 10-24 IO Loading Coefficients at 10MHz Intercept Slope PDU08DGZ_ME 1.3 0.11mW / pF PDU04DGZ_ME 1.15mW 0.11mW / pF |
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