56F8335 datasheet(151/160 Pages) FREESCALE

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Power Consumption

56F8335 Technical Data, Rev. 5

Freescale Semiconductor

151

Preliminary

Power due to capacitive loading on output pins is (first order) a function of the capacitive load and

frequency at which the outputs change. Table 10-24 provides coefficients for calculating power dissipated

in the IO cells as a function of capacitive load. In these cases:

Total Power =

Σ((Intercept +Slope*Cload)*frequency/10MHz)

where:

•

Summation is performed over all output pins with capacitive loads

•

Total Power is expressed in mW

•

Cload is expressed in pF

Because of the low duty cycle on most device pins, power dissipation due to capacitive loads was found

to be fairly low when averaged over a period of time.

E, the external [static component], reflects the effects of placing resistive loads on the outputs of the

device. Sum the total of all V2/R or IV to arrive at the resistive load contribution to power. Assume V =

0.5 for the purposes of these rough calculations. For instance, if there is a total of eight PWM outputs

driving 10mA into LEDs, then P = 8*.5*.01 = 40mW.

In previous discussions, power consumption due to parasitics associated with pure input pins is ignored,

as it is assumed to be negligible.

56F8335 Datasheet(PDF) 151 Page - Freescale Semiconductor, Inc