MP3205 – 1.3 MHz FIXED FREQUENCY 5 WHITE LED DRIVER

MP3205 Rev. 1.3

www.MonolithicPower.com

5

7/13/2005

MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.

© 2005 MPS. All Rights Reserved.

TM

Setting the LED Current

The LED current is controlled by the feedback

resistor, R1, in Figure 2. The current through

the LEDs is given by the equation 104mV/R1.

Table 1 shows the selection of resistors for a

given LED current.

R1 (Ω)

1

104

5

20.8

10

10.4

15

6.93

20

5.2

Analog and Digital Dimming

There are three different ways to control dimming

for the MP3205 during normal operation. The first

way uses a DC voltage to control the feedback

voltage. This can be seen in Figure 6. As the DC

voltage increases, current starts flowing down R1,

R2 and R3. The loop will continue to regulate the

feedback voltage to 104mV. Thus the current has

to decrease through the LEDs by the same

amount of current as is being injected from the

resistor values shown for R2 and R3 can control

the LED current from 0mA to 20mA.

MP3205

LED1

LED2

LED3

FB

3

MP3205_F06_S01

Figure 6—Dimming Control Using a DC Voltage

Other applications need to use a logic signal to

do the dimming. This can be seen in Figure 7.

The PWM signal is applied to the EN pin of the

MP3205. The LEDs will switch between full load

to completely shut off. The average current

through the LEDs will increase proportionally to

the duty cycle of the PWM signal. The PWM

signal used in Figure 7 should be 1KHz or

below due to the soft start function.

PWM

MP3205

LED1

LED2

LED3

FB

3

MP3205_F07_S01

EN

4

Figure 7—PWM Dimming Control Using a

Logic Signal

If the PWM signal is above 1KHz, dimming can

be achieved by using the circuit shown in

Figure 8.

PWM

MP3205

LED1

LED2

LED3

FB

3

MP3205_F08_S01

Figure 8—Dimming Control Using a Filtered

PWM Signal

Layout Considerations

Careful attention must be paid to the PCB

board layout and component placement. Proper

layout of the high frequency switching path is

critical to prevent noise and electromagnetic

interference

problems.

Due

to

the

high

frequency switching the length and area of all

the traces connected to the switch node should

be minimized. Refer to the evaluation board

EV3205DJ-00A

for

a

sample

layout

of