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SAA2013 Datasheet(PDF) 21 Page - NXP Semiconductors |
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SAA2013 Datasheet(HTML) 21 Page - NXP Semiconductors |
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21 / 32 page  May 1994 21 Philips Semiconductors Preliminary specification Adaptive allocation and scaling for PASC coding in DCC systems SAA2013 CHARACTERISTICS VDD = 2.7 to 5.5 V; VSS = 0 V;Tamb = −40 to 85 °C; unless otherwise specified; IOL and IOH derated by 75% for VDD < 4.5 V. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply VDD supply voltage 2.7 5.0 5.5 V IDD supply current VDD = 3.0 V 4 5 6 mA VDD = 5.0 V 7 10 12 mA Istb standby current VDD = 5.0 V −− 400 µA Inputs VIL LOW level input voltage 0 − 0.3VDD V VIH HIGH level input voltage 0.7VDD − VDD V ILI input leakage current VI =0toVDD −10 − +10 µA CI input capacitance −− 10 pF Outputs VOL LOW level output voltage IOL = 4 mA 0 − 0.4 V VOH HIGH level output voltage IOH = −4mA VDD − 0.4 − VDD V CL load capacitance −− 30 pF Inputs/outputs VIL LOW level input voltage 0 − 0.3VDD V VIH HIGH level input voltage 0.7VDD − VDD V ILI 3-state leakage current VI =0toVDD −10 − +10 µA CI input capacitance −− 10 pF VOL LOW level output voltage IOL = 4 mA 0 − 0.4 V VOH HIGH level output voltage IOH = −4mA VDD − 0.4 − VDD V CL load capacitance −− 30 pF Clock input CLK24 fi input frequency see Fig.19 − 24.576 − MHz tr rise time −− 7ns tf fall time −− 7ns tcH HIGH time 10 −− ns tcL LOW time 10 −− ns Clock input FS256 fi input frequency fs =48kHz − 12.288 − MHz fs = 44.1 kHz − 11.2896 − MHz fs =32kHz − 8.192 − MHz tr rise time −− 7ns tf fall time −− 7ns tcH HIGH time 35 −− ns tcL LOW time 35 −− ns |
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