SAB9080 datasheet(7/24 Pages) PHILIPS

7 / 24 page

1999 Nov 12

Philips Semiconductors

Preliminary speciﬁcation

NTSC Picture-In-Picture (PIP) controller

SAB9080

FUNCTIONAL DESCRIPTION

Acquisition

The internal pixel rate is 28 MHz for the Y, U and V

channels. It is expected that the bandwidth of the input

signals will be limited to 4.5 MHz for the Y input and

1.125 MHz for the U and V inputs. Inset synchronisation is

achieved via the acquisition HSYNC and VSYNC pins of

the main channel. The display is driven by the main

channel clock.

The starting-point of the acquisition can be controlled with

the acquisition fine positioning added to a system

constant. With a nominal input 1792

× fHSYNC and

standard NTSC signals, 1408 samples (active video) are

acquired and processed by the SAB9080. Here, the

nominal input fHSYNC results in a nominal system clock

frequency of 1792

× fHSYNC (approximately 28 MHz).

PIP modes

Fig.3 PIP modes.

handbook, full pagewidth

MGM810

MAIN

REPLAY

MAIN

SUB

MAIN

SUB

I2C-bus description

The I2C-bus provides bidirectional 2-line communication

between different ICs. The SDA line is the serial data line

and the SCL the serial clock line. Both lines must be

connected to a positive supply via a pull-up resistor when

connected to the output stages of a device.

Data transfer may be initiated only when the bus is not

busy. The SAB9080 has the I2C-bus address 2CH. Valid

subaddresses are 00H to 18H; registers 15H to 18H are

reserved for future extensions.

I2C-bus control is according to the I2C-bus protocol: first, a

START sequence must be put on the I2C-bus. Then, the

I2C-bus address of the circuit must be sent, followed by a

subaddress. After this sequence, the data of the

subaddresses must be sent. An auto-increment function

gives the option of sending data of the incremented

subaddresses until a STOP sequence is sent. Table 1

gives an overview of the I2C-bus addresses. The data bits

that are not used should be set to zero.

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