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DS1870 Datasheet(PDF) 21 Page - Maxim Integrated Products

Part # DS1870
Description  LDMOS RF Power-Amplifier Bias Controller
PDF  28 Pages
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

DS1870 Datasheet(HTML) 21 Page - Maxim Integrated Products

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LDMOS RF Power-Amplifier Bias
Controller
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21
A2D Value0
Temp Value
<R><NA><0000h> The signed 2’s complement direct-to-temperature measurement.
VCC Value
<R><NA><0000h> Unsigned VCC voltage measurement.
VD Value
<R><NA><0000h> Unsigned VD voltage measurement.
ID1 Value
<R><NA><0000h> Unsigned ID1 voltage measurement.
A2D Value1
ID2 Value
<R><NA><0000h> Unsigned ID2 voltage measurement.
Status
Hi Alarm
<R><NA><00h> High-Alarm Status bits.
a) Temp Hi
High-alarm status for temperature measurement.
b) VCC Hi
High-alarm status for VCC measurement.
c) VD Hi
High-alarm status for VD measurement.
d) ID1 Hi
High-alarm status for ID1 measurement.
e) ID2 HI
High-alarm status for ID2 measurement.
Lo Alarm
<R><NA><40h> Low-Alarm Status bits.
a) Temp Lo
Low-alarm status for temperature measurement.
b) VCC Lo
Low-alarm status for VCC measurement. This bit is set when the VCC supply is below
the POR trip-point value. It clears itself when a VCC measurement is completed and
the value is above the low threshold.
c) VD Lo
Low-alarm status for VD measurement.
d) ID1 Lo
Low-alarm status for ID1 measurement.
e) ID2 Lo
Low-alarm status for ID2 measurement.
I/O Status
<R><NA><see below> Status of the FAULT pin.
a) Fault
Logical value of the FAULT pin. Fault is logic HIGH during power-on.
b) Mint
Maskable Interrupt. FAULT is an open-drain output. In case FAULT was pulled low
externally or was missing the external pullup resistor, this bit reflects the logical value
the DS1870 is trying to output on the FAULT pin. If any ‘Hi Alarm’ or ‘Lo Alarm’ is
active and its corresponding ‘Fault Ena’ bit is enabled, or ‘RDBY’ is a 1, then this bit is
active high. Otherwise, this bit is a zero.
c) Rdyb
Ready Bar. When the supply is above the power-on-analog (VPOA) trip point, this bit is
active low. Thus, this bit reads a logic 1 if the supply is below VPOA or too low to com-
municate over the I2C bus.
A2D Status
<R/W><V><00h> Status of completed conversions. At power-on, these bits are cleared and are
set as each conversion is completed. These bits can be cleared so that completion
of new conversions may be verified.
a) Temp Rdy
Temperature conversion is ready.
b) VCC Rdy
VCC conversion is ready.
c) VD Rdy
VD conversion is ready.
d) ID1 Rdy
ID1 conversion is ready.
e) ID2 Rdy
ID2 conversion is ready.



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