SN74ACT7200L, SN74ACT7201LA, SN74ACT7202LA

256

× 9, 512 × 9, 1024 × 9

ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORIES

SCAS221A – FEBRUARY 1993 – REVISED SEPTEMBER 1995

5

POST OFFICE BOX 655303

functional block diagram

Read

Pointer

Location 1

Location 2

256

× 9 or

512

× 9 or

1024

× 9

RAM

•

Write

Pointer

Write

Control

Reset

Logic

Read

Control

Status-

Flag

Logic

Expansion

Logic

RS

W

XI

FL /RT

R

D0 – D8

Q0 – Q8

FF

EF

XO/HF

†

•

9

9

† 256

× 9 for SN74ACT7200L; 512 × 9 for SN74ACT7201LA; 1024 × 9 for SN74ACT7202LA

RESET AND RETRANSMIT FUNCTION TABLE

(single-device depth; single-or multiple-device width)

INPUTS

INTERNAL TO DEVICE

OUTPUTS

FUNCTION

RS

FL/RT

XI

READ POINTER

WRITE POINTER

EF

FF

XO/HF

FUNCTION

L

X

L

Location zero

Location zero

L

H

H

Reset device

H

L

L

Location zero

Unchanged

X

X

X

Retransmit

H

H

L

Increment if EF high

Increment if FF high

X

X

X

Read/write

RESET AND FIRST- LOAD FUNCTION TABLE

(multiple-device depth; single-or multiple-device width)

INPUTS

INTERNAL TO DEVICE

OUTPUTS

FUNCTION

RS

FL/RT

XI

READ POINTER

WRITE POINTER

EF

FF

FUNCTION

L

L

‡

Location zero

Location zero

L

H

Reset first device

L

H

‡

Location zero

Location zero

L

H

Reset all other devices

H

X

‡

X

X

X

X

Read/write

‡ XI is connected to XO/HF of the previous device in the daisy chain (see Figure 15).