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LTC2914

2914f

APPLICATIO S I FOR ATIO

Voltage Monitoring

The LTC2914 is a low power quad voltage monitoring cir-

cuit with four undervoltage and four overvoltage inputs. A

timeout period that holds OV or UV asserted after all faults

have cleared is adjustable using an external capacitor and

is externally disabled.

Each voltage monitor has two inputs (VHn and VLn) for

detecting undervoltage and overvoltage conditions. When

conﬁgured to monitor a positive voltage Vn using the

3-resistor circuit conﬁguration shown in Figure 1, VHn is

connected to the high-side tap of the resistive divider and

VLn is connected to the low-side tap of the resistive divider.

If an input is conﬁgured as a negative voltage monitor, the

outputs UVn and OVn in Figure 1 are swapped internally. Vn

is then connected as shown in Figure 2. Note, VHn is still

connected to the high-side tap and VLn is still connected

to the low-side tap.

Polarity Selection

The three-state polarity-select pin (SEL) selects one of three

possible polarity combinations for the input thresholds,

as described in Table 1. When an input is conﬁgured for

negative supply monitoring, VHn is conﬁgured to trigger an

overvoltage condition and VLn is conﬁgured to trigger an

undervoltage condition. With this conﬁguration, an OV con-

dition occurs when the supply voltage is more negative than

the conﬁgured threshold and a UV condition occurs when

the voltage is less negative than the conﬁgured threshold.

The three-state input pin SEL is connected to GND, VCC or

left unconnected during normal operation. When the pin

is left unconnected, the maximum leakage allowed from

the pin is ±10µA to ensure it remains in the open state.

Table 1 shows the three possible selections of polarity

based on the SEL pin connection.

Table 1. Voltage Polarity Programming (VUOT = 0.5V Typical)

SEL

V3 INPUT

V4 INPUT

VCC

Positive

VH3 < VUOT → UV

VL3 > VUOT → OV

Positive

VH4 < VUOT → UV

VL4 > VUOT → OV

Open

Positive

VH3 < VUOT → UV

VL3 > VUOT → OV

Negative

VH4 < VUOT → OV

VL4 > VUOT → UV

GND

Negative

VH3 < VUOT → OV

VL3 > VUOT → UV

Negative

VH4 < VUOT → OV

VL4 > VUOT → UV

3-Step Design Procedure

The following 3-step design procedure allows selecting

appropriate resistances to obtain the desired UV and OV trip

points for the positive voltage monitor circuit in Figure 1

and the negative voltage monitor circuit in Figure 2.

– 0.5V

LTC2914

UVn

VHn

2914 F01

VLn

OVn

–

0.5V

LTC2914

UVn

VHn

REF

2914 F02

VLn

OVn

Figure 1. 3-Resistor Positive UV/OV Monitoring Conﬁguration

Figure 2. 3-Resistor Negative UV/OV Monitoring Conﬁguration

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