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LTC3417AEFE Datasheet(PDF) 13 Page - Linear Technology |
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LTC3417AEFE Datasheet(HTML) 13 Page - Linear Technology |
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13 / 20 page ![]() 13 LTC3417A 3417afa Soft-Start Soft-start reduces surge currents from VIN by gradually increasing the peak inductor current. Power supply se- quencing can also be accomplished by controlling the ITH pin. The LTC3417A has an internal digital soft-start for each regulator output, which steps up a clamp on ITH over 1024 clock cycles, as can be seen in Figures 2 and 3. As the voltage on ITH ramps through its operating range, the internal peak current limit is also ramped at a proportional linear rate. Mode Selection The SYNC/MODE pin is a multipurpose pin which provides mode selection and frequency synchronization. Connect- ing this pin to VIN enables Burst Mode operation for both regulators, which provides the best low current efficiency at the cost of a higher output voltage ripple. When SYNC/ MODE is connected to ground, pulse skipping operation is selected for both regulators, which provides the lowest output voltage and current ripple at the cost of low current efficiency. Applying a voltage that is more than 1V from either supply results in forced continuous mode for both regulators, which creates a fixed output ripple and allows the sinking of some current (about 1/2∆IL). Since the switching noise is constant in this mode, it is also the easiest to filter out. In many cases, the output voltage can be simply connected to the SYNC/MODE pin, selecting the forced continuous mode except at start-up. The LTC3417A can also be synchronized to an external clock signal by the SYNC/MODE pin. The internal oscillator frequency should be set to 20% lower than the external clock frequency to ensure adequate slope compensation, since slope compensation is derived from the internal oscillator. During synchronization, the mode is set to pulse skipping and the top switch turn-on is synchronized to the rising edge of the external clock. When using an external clock, with the PHASE pin low, the switching of the two channels occur at the edges of the external clock. A 50% duty cycle will therefore produce 180° out-of-phase operation. Checking Transient Response The ITH pin compensation allows the transient response to be optimized for a wide range of loads and output capaci- tors. The availability of the ITH pin not only allows optimi- zation of the control loop behavior, but also provides a DC coupled and AC filtered closed-loop response test point. The DC step, rise time, and settling at this test point truly reflects the closed-loop response. Assuming a predomi- nantly second order system, phase margin and/or damp- ing factor can be estimated using the percentage of overshoot seen at this pin. The bandwidth can also be estimated using the percentage of overshoot seen at this pin or by examining the rise time at this pin. The ITH external components shown in the Figure 4 circuit will provide an adequate starting point for most applica- tions. The series RC filter sets the dominant pole-zero loop compensation. The values can be modified slightly (from 0.5 to 2 times their suggested values) to optimize transient response once the final PC layout is done and the particu- lar output capacitor type and value have been determined. APPLICATIO S I FOR ATIO Figure 2. Digital Soft-Start OUT1 Figure 3. Digital Soft-Start OUT2 VIN = 3.6V VOUT = 1.8V RL = 0.9Ω 200µs/DIV IL 1A/DIV VOUT 1V/DIV VRUN 2V/DIV VIN = 3.6V VOUT = 2.5V RL = 2Ω 200µs/DIV IL 0.5A/DIV VOUT 1V/DIV VRUN 2V/DIV |
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