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LTC3822

3822f

INPUT VOLTAGE (V)

105

100

2.2

2.4

2.6

2.8

3822 F04

3.0

2.1

2.0

2.3

2.5

2.7

2.9

VREF

MAXIMUM

SENSE VOLTAGE

Efficiency Considerations

The efficiency of a switching regulator is equal to the

output power divided by the input power. It is often useful

to analyze individual losses to determine what is limiting

efficiency and which change would produce the most

improvement. Efficiency can be expressed as:

Efficiency = 100% – (L1 + L2 + L3 + …)

where L1, L2, etc. are the individual losses as a percentage

of input power.

Although all dissipative elements in the circuit produce

losses, four main sources usually account for most of the

losses in LTC3822 circuits: 1) LTC3822 DC bias current,

2) MOSFET gate charge current, 3) I2R losses and

4) transition losses.

1) The VIN (pin) current is the DC supply current, given in

the Electrical Characteristics, which excludes MOSFET

driver currents. VIN current results in a small loss that

increases with VIN.

2) MOSFET gate charge current results from switching the

gate capacitance of the power MOSFET. Each time a

MOSFET gate is switched from low to high to low again, a

packet of charge dQ moves from BOOST to ground. The

resulting dQ/dt is a current out of BOOST, which is

typically much larger than the VIN supply current. In

continuous mode, IGATECHG = f • QP.

3) I2R losses are calculated from the DC resistances of

the MOSFETs, inductor and/or sense resistor. In continu-

ous mode, the average output current flows through L

but is “chopped” between the top MOSFET and the

bottom MOSFET. Each MOSFET’s RDS(ON) can be multi-

plied by its respective duty cycle and summed together

with the DCR of the inductor to obtain I2R losses.

4) Transition losses apply to the external MOSFET and

increase with higher operating frequencies and input

voltages. Transition losses can be estimated from:

Transition Loss = 2 • VIN2 • IO(MAX) • CRSS • f

Other losses, including CIN and COUT ESR dissipative

losses and inductor core losses, generally account for less

than 2% total additional loss.

APPLICATIO S I FOR ATIO

Low Input Supply Voltage

Although the LTC3822 can function down to below 2.4V,

the maximum allowable output current is reduced as VIN

decreases below 3V. Figure 4 shows the amount of change

as the supply is reduced down to 2.4V. Also shown is the

effect on VREF.

Minimum On-Time Considerations

Minimum on-time, tON(MIN) is the smallest amount of time

that the LTC3822 is capable of turning the top MOSFET on.

It is determined by internal timing delays and the gate

charge required to turn on the top MOSFET. Low duty cycle

and high frequency applications may approach the mini-

mum on-time limit and care should be taken to ensure that:

ON MIN

OUT

OSC

()

•

If the duty cycle falls below what can be accommodated by

the minimum on-time, the LTC3822 will begin to skip

cycles. The output voltage will continue to be regulated,

but the ripple current and ripple voltage will increase. The

minimum on-time for the LTC3822 is typically about 170ns.

However, as the peak sense voltage (IL(PEAK) • RDS(ON))

decreases, the minimum on-time gradually increases up

to about 260ns.

Figure 4. Line Regulation of VREF and Maximum Sense Voltage

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