FS7145 datasheet(10/15 Pages) AMI

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AMI Semiconductor - Rev. 3.0

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FS7140-01 / FS7140-01g / FS7145 Programmable Phase-Locked Loop Clock Generator Data Sheet

Table 9: Post Divider Control Bits

Name

Description

POST1[3:0]

POST Divider #1 (NP1) Modulus

[0000]

[0001]

[0010]

[0011]

[0100]

[0101]

[0110]

[0111]

[1000]

[1001]

[1010]

[1011]

[1100]

Do not use

[1101]

[1110]

[1111]

POST2[3:0]

POST Divider #2 (NP2) Modulus

[0000]

[0001]

[0010]

[0011]

[0100]

[0101]

[0110]

[0111]

[1000]

[1001]

[1010]

[1011]

[1100]

Do not use

[1101]

[1110]

[1111]

POST3[1:0]

POST Divider #3 (NP3) Modulus

[00]

[01]

[10]

[11]

Table 7: PLL Divider Control Bits

NAME

DESCRIPTION

REFDIV[11:0]

REFerence DIVider (NR)

FBKDIV[13:0]

FeedBacK DIVider (NR)

Table 8: SYNC Control Bits (FS7145 only)

Name

Description

SYNCEN

SYNC Enable

[0] = Disabled / [1] = Enabled

SYNCPOL

SYNC POLarity

[0] = Negative Edge / [1] = Positive Edge

Table 5: Device Configuration Bits

Name

Description

REFDSRC

REFerence Divider SouRCe

[0] = Crystal Oscillator / [1] = REF Pin

FBKDSRC

FeedB ack Divider SouRCe

[0] = VCO Output / [1] = Post Divider Output

SHUT1

SHUTdown1

[0] = Normal / [1] = Powered Down

SHUT2

SHUTdown2

[0] = Normal / [1] = Powered Down

CMOS

CLKP/CLKN Output Mode

[0] = PECL Output / [1] CMOS Output

Table 6: Main Loop Tuning Bits

Name

Description

CP[1:0]

Charge Pump Current

[00]

2.0

[01]

4.5

[10]

11.0

[11]

22.5

LR[1:0]

Loop Filter Resistor Select

[00]

400K

[01]

133K

[10]

30K

[11]

12K

Loop Filter Capacitor Select

[0]

185pF

[1]

500pF

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