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TDA3567 Datasheet(PDF) 4 Page - NXP Semiconductors |
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TDA3567 Datasheet(HTML) 4 Page - NXP Semiconductors |
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4 / 15 page ![]() June 1986 4 Philips Semiconductors Product specification NTSC decoder TDA3567 FUNCTIONAL DESCRIPTION Luminance amplifier The luminance amplifier is voltage driven and requires an input signal of 450 mV peak-to-peak (1) The luminance delay line must be connected between the i.f. amplifier and the decoder. The input signal must be a.c. coupled to the input pin 8. The black level clamp circuit of the RGB amplifiers uses the coupling capacitor as a storage capacitor. After clamping the signal is fed to a peaking stage. The RC network connected to pin 13 is used to define the amount of overshoot. The peaking stage is followed by a contrast control stage. The control voltage has to be supplied to pin 6. The control voltage range is nominally −17 to + 3 dB. The linear curve of the contrast control voltage is shown in Fig.2. Chrominance amplifier The chrominance amplifier has an asymmetrical input. The input signal at pin 3 must be a.c. coupled, and must have an amplitude of 550 mV peak-to-peak. The gain control stage has a control range in excess of 30 dB, the maximum input signal should not exceed 1,1 V peak-to-peak, otherwise clipping of the input signal will occur. From the gain control stage the chrominance signal is fed to the saturation and contrast control stages. Chrominance and luminance control stages are directly coupled to obtain good tracking. The saturation is linearly controlled via pin 5. The control voltage range is 2 V to 4 V. The impedance is high and the saturation control range is in excess of 50 dB. The burst signal is not affected by contrast or saturation control. After the amplification and control stages the chrominance signal is internally fed to the (R-Y) and (B-Y) demodulators, burst phase and a.c.c. detectors. Oscillator and a.c.c. circuit The 3,58 MHz reference oscillator operates at the subcarrier frequency. The crystal must be connected between pin 16 and ground. The oscillator does not require adjustment due to the small spreads of the IC. The free running frequency of the oscillator can be checked by connecting the saturation control (pin 5) to the positive supply line. Then the loop is opened, so that the frequency can be measured. The oscillator has an internal gain limiting stage which controls the gain to unity, so that internal signals are sinusoidal. This prevents the generation of higher harmonics of the subcarrier signals. The burst signal is compared to a 0 ° reference signal by the burst amplitude detector and is then amplified and fed to a peak detector for a.c.c. and to a sample and hold circuit which drives the colour killer circuit. The reference signal for the burst phase detector is provided by the 90 ° phase shifted signal. An RC network is used to obtain the required catching range and noise immunity for the output voltage of the burst phase detector. The hue control is obtained by mixing oscillator signals with a phase of 0 ° and 90° before they are fed to the (R-Y) and (B-Y) demodulators. The 90 ° phase shifted signal is provided by a miller integrator (biased by pin 18). As the hue control is independent of the PLL, the control will react without time delay on the control voltage changes. Demodulator circuits The demodulators are driven by the amplified and controlled chrominance signals, the reference signals are obtained from the hue control circuit. In nominal hue control position the phase angle of (R-Y) reference signal is 0 °, the phase angle of the (B-Y) reference signal is 90 °. For flesh tone corrections the demodulated (R-Y) signal is matrixed with the demodulated (B-Y) signal according to the following equations: (1) Signal with negative going sync; amplitude includes sync pulse amplitude. RY – () matrixed 161 R Y – () IN 0 – 42 B Y – () IN ,, = GY – () matrixed 043 R Y – () IN 0 – 11 B Y – () IN ,, = BY – () matrixed BY – () IN = |
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