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AD8153ACPZ Datasheet(PDF) 14 Page - Analog Devices

Part # AD8153ACPZ
Description  3.2 Gbps Single Buffered Mux/Demux Switch
PDF  24 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD8153ACPZ Datasheet(HTML) 14 Page - Analog Devices

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AD8153
Data Sheet
Rev. A | Page 14 of 24
LB_A
LB_B
LB_C
SEL
BICAST
Output A
Output B
Output C
1
0
1
X
1
Input A
Input C
Input C
1
0
1
1
X
Input A
Input C
Input C
1
1
0
0
X
Input A
Input B
Input A
1
1
0
1
X
Input A
Input B
Input B
1
1
1
X
X
Input A
Input B
Input C
RECEIVE EQUALIZATION
In backplane applications, the AD8153 needs to compensate for
signal degradation caused by long traces. The device supports
two levels of input equalization, configured on a per-port basis.
Table 6 summarizes the high-frequency asymptotic gain boost
for each setting.
Table 6. Receive Equalization Settings
EQ_A/B/C
EQ Boost
0
6 dB
1
12 dB
TRANSMIT PRE-EMPHASIS
Transmitter pre-emphasis levels can be set by pin control or
through the control registers when using the I2C interface. Pin
control allows two settings of PE. The control registers provide
two additional settings.
Table 7. Pre-Emphasis Settings
Serial Mode
Pin Mode
PE_A/B/C Setting
PE_A/B/C
PE Boost (%)
PE Boost (dB)
0
0
0
0
1
N/A
25
1.9
2
1
50
3.5
3
N/A
75
4.9



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