LD5523D2GL datasheet(10/17 Pages) LEADTREND

10 / 17 page

LD5523D2

11/11/2020

Leadtrend Technology Corporation

www.leadtrend.com.tw

LD5523D2-DS-00 November 2020

secondary current discharge time from previous cycle.

And will be hold until the next sampling period. The

sampled voltage is compared with an internal reference

VREF (2.00V) and the error will be amplified. The error

amplifier output COMP reflects the load condition and

controls the duty cycle to regulate the output voltage, thus

constant output voltage can be achieved. The output

voltage is given as:

OUT

)

)(

(





Where VF indicates the drop voltage of the output diode,

Ra and Rb are top and bottom feedback resistor value, Ns

and Na are the turns of transformer secondary and

auxiliary.

In case that the output voltage is sensed through the

auxiliary winding; the leakage inductance will induce

ringing to affect output regulation. To optimize the

collector voltage clamp circuit will minimize the high

frequency ringing and achieve the best regulation. Fig. 14

shows the voltage waveform of drain to source in compare

to those with large undershoot due to leakage inductance

induced ring (Fig. 15). The ringing may make the sample

error and cause poor performance for output voltage

regulation. A proper selection for resistor RS which in

series to the clamp diode, may reduce any large

undershoot, as shown in Fig. 13.

OUT

COMP

VIN

LD5523D2

LEB time

ROCP

VCS

RCS

Fig. 13

VDS

The overshoot

here is minor

Fig. 14

VDS

The undershoot would

make the sample error.

Fig. 15

Load Regulation Compensation

LD5523D2

implemented

with

load

regulation

compensation to compensate the cable voltage drop and

to achieve a better voltage regulation. The offset voltage

across FB is produced by the internal sink current source

during the sampling period. The internal sink current

source is proportional to the value of over load current to

compensate the cable loss as shown in Fig. 16. So, the

offset voltage will decrease linearly and smoothly as the

output current decreases from full-load to no-load. It is

programmable by adjusting the resistance of the voltage

divider to compensate the drop for cable lines used in

various conditions. The ILC_MAX is 6

μA for LD5523D2 a.

The equation of internal sink current is shown as:

�� = 6 ×

��

(��)

Where

The IRATED means the output current in rated.

The ILC is calculated current of load compensation.

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