September 1993

8

Philips Semiconductors

Preliminary specification

Sync Processor with Clock (SPC)

TDA4691

CHARACTERISTICS

input signal referenced to CCIR standard.

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

Supply (pins 19 and 12; all voltages are measured with regard to ground (pins 3 and 8))

supply voltage

7.2

8.0

8.8

V

supply current

−

20

30

mA

supply voltage

5.0

5.5

V

supply current

−

15

30

mA

total power dissipation

−

260

430

mW

Sync separator (pin 20)

input voltage (peak-to-peak value)

AC coupled

−

12

V

sync amplitude (peak-to-peak value)

0.1

−

0.6

V

source resistor of generator

−−

1k

Ω

current during sync

−−30

−µA

current during remaining time

−

1

−µA

Black level (pin 1)

SLH

slicing level H

−

50

−

%

SLV

slicing level V

−

50

−

%

Sync output (pin 9)

no sync

−

0.3

−

V

positive sync

2.7

−

V

load capacitance

−−

40

pF

time delay between pin 20 and pin 9

see Fig.3

100

200

500

ns

time delay between pin 20 and pin 9

see Fig.3

100

300

500

ns

Phase detector (pins 16 and 17)

nominal sync frequency

−

15.625

−

kHz

−

15.625

−

kHz

current at sync time

(fast and normal time constant)

−±240

−µA

current at sync time (slow time constant)

−±80

−µA

current at sync time

−±2

−

mA

filter 2 voltage

1.5

3

4.5

V

filter 1 voltage

1.5

3

4.5

V

∆f

VCO sensitivity

see VCO

−

360

−

kHz/V

13.5 MHz VCO (pin 15)

see Fig.4(a)

−

3.75

−

k

Ω

see Fig.4(a)

2.9

3

3.1

V

current for 13.5 MHz

−720

−800

−880

µA

15.2

−

18.6

kHz/

µA