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TDA8050 Datasheet(PDF) 8 Page - NXP Semiconductors |
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TDA8050 Datasheet(HTML) 8 Page - NXP Semiconductors |
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8 / 24 page ![]() 1999 Dec 14 8 Philips Semiconductors Product specification QPSK transmitter TDA8050 H3 3rd-order harmonic of 5 to 40 MHz signal Fig.6 fi =15to40MHz −−−45 dBc fi = 54 to 120 MHz −−−35 dBc Overall; note 1 Φosc phase noise note 2; at 10 kHz −−70 − dBc/Hz at 100 kHz −−90 − dBc/Hz So spurious signals of 5 to 40 MHz signal fi = 5 to 40 MHz; Vi(dif) = 100 mV at I and Q inputs; Vo = 30 to 55 dBmV −−−50 dBc ISOtot total isolation at I/Q mid-range see Fig.7 −−−65 dBc C/N carrier to noise ratio at final output at 2 MHz from carrier Vi(dif) = 100 mV Vo = 35 to 55 dBmV; fi = 26.5 MHz − 113 − dBc/Hz Crystal oscillator fxtal crystal frequency note 3 1 − 4 MHz Zi input impedance fxtal = 4 MHz 600 1200 −Ω VI(DC) DC input level − 2.9 − V Modulator synthesizer fref(mod) reference frequency − 250 − kHz RDR1 reference divider ratio programmable 4 − 16 ND1 fixed main divider ratio − 1120 − Icp charge-pump current fixed − 0.30 − mA Converter synthesizer fstep frequency step size 50 − 500 kHz RD2 fixed reference divider ratio − 2 − RDR2 reference divider ratio programmable see Table 4 4 − 160 ND2 fixed main divider ratio − 4 − NDR2 programmable main divider ratio see Table 4 290 − 3600 Three wire bus VIL LOW-level input voltage −− 0.8 V VIH HIGH-level input voltage 2.4 −− V Lock detect pin Vo(lock) output voltage (lock) − 5 − V Vo(unlock) output voltage (unlock) − 0.02 − V SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT |
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