TDA8362 datasheet(13/36 Pages) PHILIPS

13 / 36 page

March 1994

Philips Semiconductors

Objective speciﬁcation

Integrated PAL and PAL/NTSC TV

processors

TDA8360; TDA8361; TDA8362

IF AND TUNER AGC; NOTE 12

Timing of IF-AGC (C48 = 2.2

µF)

modulated video interference

30% AM for 1 to

100 mV; 0 to 200 Hz

−−

tinc

response time for an IF input signal

amplitude increase of 52 dB for

positive and negative modulation

−

tdec

response time for an IF input signal

amplitude decrease of 52 dB

for negative modulation

−

for positive modulation (TDA8362)

−

100

−

Ileak

allowed leakage current of the AGC

capacitor

note 13

for negative modulation

−−

µA

for positive modulation

−−

200

Tuner take-over adjustment (pin 49)

V49(rms)

minimum starting level voltage for

tuner take-over (RMS value)

−

0.2

0.5

V49(rms)

maximum starting level voltage for

tuner take-over (RMS value)

100

150

−

Vcr

control voltage range

0.5

−

4.5

Tuner control output (pin 47)

V47

maximum tuner AGC output voltage

maximum gain

−−

VP + 1

V47(sat)

output saturation voltage

minimum gain;

I47 =2 mA

−−

300

I47

maximum tuner AGC output swing

−−

Ileak

leakage current RF AGC

−−

µA

∆V47

input signal variation for complete

tuner control

IO(max) = 1 mA

AFC OUTPUT; NOTE 14 (PIN 44)

V44

output voltage swing

−

fsl

AFC slope

−

mV/kHz

fos

AFC offset

note 7

−−

kHz

output voltage at centre frequency

−

3.5

−

output impedance

−

Ω

SWITCHING TO POSITIVE MODULATION (TDA8362); NOTE 15 (PIN 1)

minimum voltage on pin 1 to switch

the video demodulator and AGC to

positive modulation

−−

VP − 1V

input current

−−

1mA

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

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