ST7LITE49M datasheet(84/188 Pages) STMICROELECTRONICS

Part #	ST7LITE49M

Description	8-bit MCU with single voltage Flash memory data EEPROM, ADC, 8/12-bit timers, and I²C interface

PDF	188 Pages

Scroll/Zoom	100%

Manufacturer	STMICROELECTRONICS [STMicroelectronics]

Direct Link	http://www.st.com

Logo

84 / 188 page

On-chip peripherals

ST7LITE49M

84/188

Figure 41.

PWM signal from 0% to 100% duty cycle

Dead time generation

A dead time can be inserted between PWM0 and PWM1 using the DTGR register. This is

required for half-bridge driving where PWM signals must not be overlapped. The non-

overlapping PWM0/PWM1 signals are generated through a programmable dead time by

setting the DTE bit.

DTGR[7:0] is buffered inside so as to avoid deforming the current PWM cycle. The DTGR

effect will take place only after an overflow.

Note:

Dead time is generated only when DTE=1 and DT[6:0]

≠ 0. If DTE is set and DT[6:0]=0,

PWM output signals will be at their reset state.

Half Bridge driving is possible only if polarities of PWM0 and PWM1 are not inverted, i.e. if

OP0 and OP1 are not set. If polarity is inverted, overlapping PWM0/PWM1 signals will be

generated.

Dead Time generation does not work at 1msec timebase.

COUNTER

FFDh

FFEh

FFFh

FFDh

FFEh

FFFh

FFDh

FFEh

DCRx=000h

DCRx=FFDh

DCRx=FFEh

DCRx=000h

ATR= FFDh

fCOUNTER

Dead time

DT 6:0

[] Tcounter1

ST7LITE49M Datasheet(PDF) 84 Page - STMicroelectronics