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TDA8761 Datasheet(PDF) 8 Page - NXP Semiconductors

Part # TDA8761
Description  9-bit analog-to-digital converter for digital video
PDF  20 Pages
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

TDA8761 Datasheet(HTML) 8 Page - NXP Semiconductors

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1995 Mar 20
8
Philips Semiconductors
Preliminary specification
9-bit analog-to-digital converter for
digital video
TDA8761
BANDWIDTH (fclk = 30 MHz)
B
analog bandwidth
full-scale sine wave;
note 6
−
40
−
MHz
75% full-scale sine
wave; note 6
−
55
−
MHz
small signal at
mid-scale;
VI = ±10 LSB at
code 256; note 6
−
700
−
MHz
tSTLH
analog input settling time
LOW-to-HIGH
full-scale square wave;
Fig.5; note 7
−
2.0
tbf
ns
tSTHL
analog input settling time
HIGH-to-LOW
full-scale square wave;
Fig.5; note 7
−
2.5
tbf
ns
HARMONICS (fclk =30MHZ)
THD
total harmonic distortion
fi =10MHz
−−64
−
dB
SIGNAL-TO-NOISE RATIO; see Fig.7; note 8
S/N
signal-to-noise ratio (full scale)
without harmonics;
fclk = 30 MHz;
fi =10MHz
53
55
−
dB
EFFECTIVE BITS; see Fig 6; note 8
EB
effective bits
fclk = 30 MHz;
fi =10MHz
−
8.5
−
bits
TWO-TONE; note 9
TTIR
two-tone intermodulation rejection
fclk =30MHz
−−64
−
dB
BIT ERROR RATE
BER
bit error rate
fclk = 30 MHz;
fi = 10 MHz;
VI = ±16 LSB at
code 256
−
10−13
−
times/
sample
DIFFERENTIAL GAIN; note 10
Gdiff
differential gain
fclk = 30 MHz;
PAL modulated ramp
−
tbf
−
%
DIFFERENTIAL PHASE; note 10
ϕdiff
differential phase
fclk = 30 MHz;
PAL modulated ramp
−
tbf
−
deg
Timing (fclk = 30 MHz; CL = 15 pF); see Fig.3; note 11
tds
sampling delay time
−−
2ns
th
output hold time
5
−−
ns
td
output delay time
−
10
14
ns
CL
digital output load
−
15
40
pF
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT



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