TDA9809 datasheet(17/40 Pages) PHILIPS

17 / 40 page

1998 Jan 08

Philips Semiconductors

Preliminary speciﬁcation

Single standard multimedia IF-PLL and FM

radio demodulator

TDA9809M

Notes

1. Video and sound parameters are degraded at VP ≤ 4.5 V.

2. This parameter is not tested during production and is provided as application information for use in designing the

television receiver.

3. Loop bandwidth BL = 70 kHz (natural frequency fn = 12 kHz; damping factor d ≈ 3; calculated for peak level).

Resonance circuit of VCO: Q0 > 50; CVCO = 8.2 pF ± 0.25 pF; Cint ≈ 8.5 pF (loop voltage ≈ 2.7 V).

4. Temperature coefficient of external LC circuit is equal to zero.

5. Vi(VIF)(rms) =10mV; ∆f = 1 MHz (VCO frequency offset related to picture carrier frequency); white picture

video modulation.

6. Vi(VIF) signal for nominal video signal.

7. The leakage current of the AGC capacitor should not exceed 1

µA to avoid larger tilt.

8. S/N is the ratio of black-to-white amplitude to the black level noise voltage (RMS value, pin 13). B = 5 MHz weighted

in accordance with

“CCIR 567”.

9. The intermodulation figures are defined:

;

αIM(0.92/1.1) value at 0.92 or 1.1 MHz referenced to

black/white signal;

;

αIM(2.76/3.3) value at 2.76 or 3.3 MHz referenced to colour carrier.

10. Measurements taken with SAW filter G1962 (sound shelf: 20 dB); loop bandwidth = 70 kHz.

a) Modulation VSB; sound carrier off; fvideo > 0.5 MHz.

b) Sound carrier on; SIF SAW filter K9453; fvideo = 10 kHz to 10 MHz.

11. Response speed valid for a VIF input level range of 200

µVupto70mV.

12. A current source output is provided to match the AFC output signal to different tuning systems. The test circuit is

given in Fig.6 for TV mode and in Fig.11 for radio mode. The AFC steepness can be changed by the resistors at

pin 14.

a) A voltage output is provided to match the AFC output signal to different tuning systems. The DC load current

should not exceed 180

µA.

13. Depending on the ratio

∆C/C0 of the LC resonant circuit of the VCO (Q0 > 50; see note 3; C0 =Cint +Cext).

Switching levels for logic port 0; see also Table 2

Vlogic

DC potential for logic 1

or pin not connected

2.8

−

DC potential for logic 0

−

0.8

IIL

LOW-level input

current

V3,8 = 0 V

507090

µA

Switching levels for logic port 2; see also Table 2 and Fig.12

Vlogic

DC potential for logic 1

or pin not connected

0.8

−

DC potential for logic 0

−

0.8

IIL

LOW-level input

current

V11 = 0 V

110

150

190

µA

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

IM(0.92/1.1)

0 at 3.58 (4.4) MHz

0 at 0.92 (1.1) MHz

-------------------------------------------------------







3.6 dB

log

IM(2.76/3.3)

0 at 3.58 (4.4) MHz

0 at 2.76 (3.3) MHz

-------------------------------------------------------







log

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