TDA9852 datasheet(17/40 Pages) PHILIPS

17 / 40 page

1997 Mar 11

Philips Semiconductors

Preliminary speciﬁcation

I2C-bus controlled BTSC stereo/SAP

decoder and audio processor

TDA9852

Automatic volume level control (AVL)

input impedance

8.8

11.0

13.2

Ω

Vi(rms)

maximum input voltage

(RMS value)

THD < 0.2%

tbf

−

gain, maximum boost

maximum attenuation

Gstep

equivalent step width between

the input stages

(soft switching system)

−

1.5

−

Viop(rms)

input level at maximum boost

(RMS value)

−

0.1

−

input level at maximum

attenuation (RMS value)

−

1.125

−

Vo(rms)

output level in AVL operation

(RMS value)

see Fig.5

160

200

250

VDC OFF

DC offset between different

gain steps

voltage at pin CAV

6.50 to 6.33 V or

6.33 to 6.11 V or

6.11 to 5.33 V or

5.33 to 2.60 V; note 6

−−

6mV

Ratt

discharge resistors for attack

time constant

AT1 = 0; AT2 = 0; note 7

340

420

520

Ω

AT1 = 1; AT2 = 0; note 7

590

730

910

Ω

AT1 = 0; AT2 = 1; note 7

0.96

1.2

1.5

Ω

AT1 = 1; AT2 = 1; note 7

1.7

2.1

2.6

Ω

Idec

charge current for decay time

normal mode; CCD = 0; note 8 1.6

2.0

2.4

µA

power-on speed-up; CCD = 1;

note 8

−

tbf

−µA

Selector from pins LOL, LOR, LIL and LIR to pins SOL and SOR

input impedance

Ω

input isolation of one selected

source to the other input

Vi =1V; fi = 1 kHz

−

Vi =1V; fi = 12.5 kHz

−

Vi(rms)

maximum input voltage

(RMS value)

THD < 0.5%

2.3

−

VDC OFF

DC offset voltage at selector

output by selection of any

inputs

−−

output impedance

−

120

Ω

output load resistance

−−

Ω

output load capacitance

−

2.5

voltage gain, selector

−

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

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