ADA4092-4

Rev. B | Page 15 of 20

THEORY OF OPERATION

The ADA4092-4 is a single-supply, micropower amplifier

featuring rail-to-rail inputs and outputs. To achieve wide input

and output ranges, these amplifiers employ unique input and

output stages.

INPUT STAGE

In Figure 48, the input stage comprises two differential pairs, a

PNP pair (PNP input stage) and an NPN pair (NPN input stage).

These input stages do not work in parallel. Instead, only one

stage is on for any given input common-mode signal level. The

PNP stage (Transistor Q1 and Transistor Q2) is required to ensure

that the amplifier remains in the linear region when the input

voltage approaches and reaches the negative rail. Alternatively,

the NPN stage (Transistor Q5 and Transistor Q6) is needed for

input voltages up to, and including, the positive rail.

For the majority of the input common-mode range, the PNP

stage is active, as shown in Figure 8 through Figure 13. Notice

that the VOS shifts and that the bias current switches direction at

approximately 1.5 V below the positive rail. At voltages below this

level, the bias current flows out of the ADA4092-4 input, from

the PNP input stage. However, above this voltage, the bias

current enters the device due to the NPN stage. The actual

mechanism within the amplifier for switching between the input

stages comprises Q3, Q4, and Q7. As the input common-mode

voltage increases, the emitters of Q1 and Q2 follow that voltage

plus a diode drop. Eventually, the emitters of Q1 and Q2 are

high enough to turn on Q3, which diverts the tail current away

from the PNP input stage, turning it off. The tail current of the

PNP pair is diverted to the Q4/Q7 current mirror to activate the

NPN input stage, as shown in Figure 48.

A common practice in bipolar amplifiers to protect the input

transistors from large differential voltages is to include series

resistors and differential diodes. See Figure 49 for the full input

protection circuitry. These diodes turn on whenever the differential

voltage exceeds approximately 0.6 V. In this condition, current

flows between the input pins, limited only by the two 5 kΩ

resistors. Evaluate each application carefully to make sure that

the increase in current does not affect performance.

OUTPUT STAGE

The output stage in the ADA4092-4 device uses a PNP and an

NPN transistor, as do most output stages. However, Q32 and

Q33, the output transistors, connect with their collectors to an

output pin to achieve the rail-to-rail output swing.

As the output voltage approaches either the positive or the

negative rail, these transistors begin to saturate. Thus, the final

limit on output voltage is the saturation voltage of these transistors,

which is about 50 mV. The output stage has inherent gain arising

from the transistor output impedance, as well as any external load

impedance; consequently, the open-loop gain of the op amp is

dependent on the load resistance and decreases when the output

voltage is close to either rail.

Q1

Q3

–IN

Q5

Q6

Q11

Q10

Q8

Q7

Q4

Q13

Q15

Q14

Q12

Q9

Q16

Q17

Q18

Q19

Q32

OUT

Q33

+IN

Q2

Figure 48. Simplified Schematic Without Input Protection (See Figure 49)