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MCP1802 Datasheet(PDF) 10 Page - Microchip Technology

Part # MCP1802
Description  300 mA, High PSRR, Low Quiescent Current LDO
PDF  24 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MCP1802 Datasheet(HTML) 10 Page - Microchip Technology

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MCP1802
DS22053A-page 10
© 2007 Microchip Technology Inc.
3.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
PIN FUNCTION TABLE
3.1
Ground Terminal (GND)
Regulator ground. Tie GND to the negative side of the
output and the negative side of the input capacitor.
Only the LDO bias current (25 µA typical) flows out of
this pin; there is no high current. The LDO output
regulation is referenced to this pin. Minimize voltage
drops between this pin and the negative side of the
load.
3.2
Regulated Output Voltage (VOUT)
Connect VOUT to the positive side of the load and the
positive terminal of the output capacitor. The positive
side of the output capacitor should be physically
located as close to the LDO VOUT pin as is practical.
The current flowing out of this pin is equal to the DC
load current.
3.3
Unregulated Input Voltage (VIN)
Connect VIN to the input unregulated source voltage.
Like all low dropout linear regulators, low source
impedance is necessary for the stable operation of the
LDO. The amount of capacitance required to ensure
low source impedance will depend on the proximity of
the input source capacitors or battery type. For most
applications, 0.1 µF of capacitance will ensure stable
operation of the LDO circuit.
The type of capacitor
used can be ceramic, tantalum or aluminum electro-
lytic. The low ESR characteristics of the ceramic will
yield better noise and PSRR performance at high-
frequency.
3.4
Shutdown Input (SHDN)
The SHDN input is used to turn the LDO output voltage
on and off. When the SHDN input is at a logic-high
level, the LDO output voltage is enabled. When the
SHDN input is pulled to a logic-low level, the LDO
output voltage is disabled and the LDO enters a low
quiescent current shutdown state where the typical qui-
escent current is 0.01 µA. The SHDN pin does not
have an internal pullup or pulldown resistor. The the
SHDN pin must be connected to either VIN or GND to
prevent the device from becoming unstable.
Pin No.
SOT-23-5
Name
Function
2
GND
Ground Terminal
5VOUT
Regulated Voltage Output
1VIN
Unregulated Supply Voltage
3SHDN
Shutdown
4
NC
No connection



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