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OP27GS Datasheet(PDF) 1 Page - Analog Devices |
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OP27GS Datasheet(HTML) 1 Page - Analog Devices |
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1 / 21 page ![]() Low Noise, Precision Operational Amplifier Data Sheet OP27 Rev. H Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©1981–2015 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com FEATURES Low noise: 80 nV p-p (0.1 Hz to 10 Hz), 3 nV/√Hz Low drift: 0.2 µV/°C High speed: 2.8 V/µs slew rate, 8 MHz gain bandwidth Low VOS: 10 µV CMRR: 126 dB at VCM of ±11 V High open-loop gain: 1.8 million Available in die form GENERAL DESCRIPTION The OP27 precision operational amplifier combines the low offset and drift of the OP07 with both high speed and low noise. Offsets down to 25 µV and maximum drift of 0.6 µV/°C make the OP27 ideal for precision instrumentation applications. Low noise, en = 3.5 nV/√Hz, at 10 Hz, a low 1/f noise corner frequency of 2.7 Hz, and high gain (1.8 million), allow accurate high-gain amplification of low-level signals. A gain bandwidth product of 8 MHz and a 2.8 V/µs slew rate provide excellent dynamic accuracy in high speed, data-acquisition systems. A low input bias current of ±10 nA is achieved by use of a bias current cancellation circuit. Over the military temperature range, this circuit typically holds IB and IOS to ±20 nA and 15 nA, respectively. The output stage has good load driving capability. A guaranteed swing of ±10 V into 600 Ω and low output distortion make the OP27 an excellent choice for professional audio applications. (Continued on Page 3) PIN CONFIGURATIONS V+ OUT NC 4V– (CASE) BAL BAL 1 –IN 2 +IN 3 OP27 NC = NO CONNECT Figure 1. 8-Lead TO-99 (J-Suffix) 8 7 6 5 1 2 3 4 NC = NO CONNECT VOS TRIM –IN +IN VOS TRIM V+ OUT NC V– OP27 Figure 2. 8-Lead CERDIP – Glass Hermetic Seal (Z-Suffix), 8-Lead PDIP (P-Suffix), and 8-Lead SOIC (S-Suffix) FUNCTIONAL BLOCK DIAGRAM VOS ADJ. NONINVERTING INPUT (+) INVERTING INPUT (–) V– V+ Q2B R21 Q3 Q2A Q1A Q1B R4 R11 R3 1 8 . R1 AND R2 ARE PERMANENTLY ADJUSTED AT WAFER TEST FOR MINIMUM OFFSET VOLTAGE 1 Q6 Q21 C2 R23 R24 Q23 Q24 Q22 R5 Q11 Q12 Q27 Q28 C1 R9 R12 C3 C4 Q26 Q20 Q19 Q46 Q45 OUTPUT Figure 3. |
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