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TPS73601DBVT Datasheet(PDF) 20 Page - Texas Instruments

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Part # TPS73601DBVT
Description  TPS736 Capacitor-Free, NMOS, 400mA, Low-Dropout Regulator With Reverse Current Protection
PDF  51 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TPS73601DBVT Datasheet(HTML) 20 Page - Texas Instruments

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7.2.1 Design Requirements
For this design example, use the parameters listed below as the input parameters.
Table 7-1. Design Parameters (Fixed-Voltage Version)
PARAMETER
DESIGN REQUIREMENT
Input voltage
5 V, ±3%
Output voltage
3.3 V, ±1%
Output current
400 mA (maximum), 20 mA (minimum)
RMS noise, 10 Hz to 100 kHz
< 30 μVRMS
Ambient temperature
55°C (maximum)
Table 7-2. Design Parameters (Adjustable-Voltage Version)
PARAMETER
DESIGN REQUIREMENT
Input voltage
5 V, ±3%, provided by the dc/dc converter switching at 1 MHz
Output voltage
2.5 V, ±1%
Output current
0.4 A (maximum), 10 mA (minimum)
RMS noise, 10 Hz to 100 kHz
< 35 μVRMS
Ambient temperature
55°C (maximum)
7.2.2 Detailed Design Procedure
The first step when designing with a linear regulator is to examine the maximum load current along with the
input and output voltage requirements to determine if the device thermal and dropout voltage requirements can
be met. At 0.4 A, the dropout voltage of the TPS73633 is a maximum of 200 mV over temperature; thus, the
dropout headroom is sufficient for operation over both input and output voltage accuracy.
The maximum power dissipated in the linear regulator is the maximum voltage dropped across the pass
transistor from the input to the output times the maximum load current. In this example, the maximum voltage
drop across in the pass transistor is 5 V + 3% (5.15 V) minus 3.3 V – 1% (3.267 V) or 1.883 V. The power
dissipated in the pass transistor is calculated by taking this voltage drop multiplied by the maximum load current.
For this example, the maximum power dissipated in the linear regulator is 942 mW. Once the power dissipated
in the linear regulator is known, the corresponding junction temperature rise can be calculated. To calculate the
junction temperature rise above ambient, the power dissipated must be multiplied by the junction-to-ambient
thermal resistance. For thermal resistance information see the Thermal Protection section. For this example,
using the DRB package, the maximum junction temperature rise is calculated to be 45°C. The maximum junction
temperature rise is calculated by adding junction temperature rise to the maximum ambient temperature. In this
example, the maximum junction temperature is 100°C. Keep in mind the maximum junction temperate must be
below 125°C for reliable operation. Addition ground planes, added thermal vias, and air flow all help to lower the
maximum junction temperature. Using the DCQ or DBV packages are not recommended for this application due
to the excessive junction temperature rise that would be incurred.
To get the noise level below 30 µVRMS, a noise reduction capacitance (CNR) of 10 nF is selected along with
an output capacitance of 10 μF. Referencing the Output Noise section, the RMS noise can be calculated to be
28 µVRMS.
Use of an input capacitor is optional. However, in systems where the input supply is located several inches away
from the LDO, a small 0.1-µF input capacitor is recommended to negate the adverse effects that input supply
inductance has on stability and ac performance.
In the same way as with designing with a fixed output voltage, the first step is to examine the maximum load
current along with the input and output voltage requirements to determine if the device thermal and dropout
voltage requirements are met. At 0.4 A, the maximum dropout voltage is 200 mV. Since the input voltage is 5
V and the output voltage is 2.5 V, there is more than sufficient voltage headroom to avoid dropout and maintain
good PSRR.
TPS736
SBVS038V – SEPTEMBER 2003 – REVISED SEPTEMBER 2024
www.ti.com
20
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Product Folder Links: TPS736



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