PI6C487016 datasheet(4/8 Pages) PERICOM

4 / 8 page

PI6C487016

Low Skew, 1-to-16

LVCMOS/LVTTL Clock Driver

PS8741D

07/29/05

LVCMOS/LVTTL DC Characteristics, (VDD = 3.3V ±5%, TA = -40º to +85ºC)

Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Units

VIH

Input High Voltage

SELx, ENX,

nMR/OE, CLK_SEL

VDD + 0.3

CLK0

VDD + 0.3

VIL

Input Low Voltage

SELx, ENx,

nMR/OE, CLK_SEL

-0.3

0.8

CLK0

-0.3

1.3

IIH

Input High Current

ENx, SELx,

nMR/OE

VDD = VIN = 3..465V

µA

CLK0, CLK_SEL

150

IIL

Input Low Current

ENx, SELx,

nMR/OE

VDD = 3.465, VIN = 0V

-150

CLK0, CLK_SEL

-5

VOH

Output High Voltage(1)

VDDOX = 3.3 ± 5%

2.6

VDDOX = 2.5 ± 5%

1.8

VDDOX = 1.8 ± 5%

IOH = -2mA

VDD

- 0.45

VOL

Output Low Voltage(1)

VDDOX = 3.3 ± 5%

0.5

VDDOX = 2.5 ± 5%

0.5

VDDOX = 1.8 ± 5%

IOH = -2mA

0.45

IOZL

Output Tristate Current Low

-5

µA

IOZH

Output Tristate Curretn High

Notes:

1. Outputs terminate with 50Ω to VDDOX/2. See Parameter Measurement information, Output Load Test Circut

Differential DC Characteristics, (VDD = 3.3V ±5%, TA = -40º to +85ºC)

Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Units

IIH

Input High Current

nCLK1

VIN = VDD = 3.465V

µA

CLK1

VIN = VDD = 3.465V

150

IIL

Input Low Current

nCLK1

VIN = 0V, VDD = 3.465V

-150

CLK1

VIN = 0V, VDD = 3.465V

-5

VPP

Peak-to-peak Input Voltage

0.15

1.3

VCMR

Common mode input voltage(1,2)

GND + 0.5

VDD -0.85

Notes:

1. For single ended application, the maximum input voltage for CLK1, nCLK1 is VDD + 0.3V.

2. Common mode voltage is definded as VIH.

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