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UAA2073AM Datasheet(PDF) 4 Page - NXP Semiconductors

Part # UAA2073AM
Description  Image rejecting front-end for GSM applications
PDF  20 Pages
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

UAA2073AM Datasheet(HTML) 4 Page - NXP Semiconductors

  UAA2073AM Datasheet HTML 1Page - NXP Semiconductors UAA2073AM Datasheet HTML 2Page - NXP Semiconductors UAA2073AM Datasheet HTML 3Page - NXP Semiconductors UAA2073AM Datasheet HTML 4Page - NXP Semiconductors UAA2073AM Datasheet HTML 5Page - NXP Semiconductors UAA2073AM Datasheet HTML 6Page - NXP Semiconductors UAA2073AM Datasheet HTML 7Page - NXP Semiconductors UAA2073AM Datasheet HTML 8Page - NXP Semiconductors UAA2073AM Datasheet HTML 9Page - NXP Semiconductors Next Button
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1997 Jan 27
4
Philips Semiconductors
Product specification
Image rejecting front-end
for GSM applications
UAA2073AM
PINNING
SYMBOL
PIN
DESCRIPTION
SBS
1
sideband selection (should be
grounded for fLO <fRF)
n.c.
2
not connected
n.c.
3
not connected
VCC1
4
supply voltage for receive and
transmit sections
RFINA
5
RF input A (balanced)
RFINB
6
RF input B (balanced)
GND1
7
ground 1 for receive and transmit
sections
TXINA
8
transmit mixer input A (balanced)
TXINB
9
transmit mixer input B (balanced)
SXON
10
hardware power-on of LO section
(including buffers to RX and TX)
RXON
11
hardware power-on for receive
section and LO buffers to RX
TXON
12
hardware power-on for transmit
section and LO buffers to TX
TXOIFB
13
transmit mixer IF output B
(balanced)
TXOIFA
14
transmit mixer IF output A
(balanced)
VCC2
15
supply voltage for LO section
GND2
16
ground 2 for LO section
LOINB
17
LO input B (balanced)
LOINA
18
LO input A (balanced)
IFB
19
IF output B (balanced)
IFA
20
IF output A (balanced)
Fig.2 Pin configuration.
handbook, halfpage
UAA2073AM
MGD150
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
SBS
n.c.
n.c.
RFINA
RFINB
GND1
TXINA
TXINB
SXON
RXON
TXON
TXOIFB
TXOIFA
GND2
LOINB
LOINA
IFB
IFA
VCC1
VCC2



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