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ICS9FG107 Datasheet(PDF) 8 Page - Integrated Device Technology

Part # ICS9FG107
Description  Programmable FTG for Differential P4TM CPU, PCI-Express & SATA Clocks
PDF  18 Pages
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

ICS9FG107 Datasheet(HTML) 8 Page - Integrated Device Technology

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IDTTM/ICSTM Programmable FTG for Differential P4
TM CPU, PCI-Express & SATA Clocks
ICS9FG107
REV F 08/21/07
ICS9FG107
Programmable FTG for Differential P4
TM CPU, PCI-Express & SATA Clocks
8
I
2C Table: Byte Count Register
Pin #
Name
Control Function
Type0
1
PWD
Bit 7
BC7
RW
-
-
0
Bit 6
BC6
RW
-
-
0
Bit 5
BC5
RW
-
-
0
Bit 4
BC4
RW
-
-
0
Bit 3
BC3
RW
-
-
0
Bit 2
BC2
RW
-
-
1
Bit 1
BC1
RW
-
-
1
Bit 0
BC0
RW
-
-
1
Byte 6
-
Writing to this
register will configure
how many bytes will
be read back, default
is 07 = 7 bytes.
-
-
-
-
-
-
-



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