ICS8741004

DIFFERENTIAL-TO-LVDS/0.7V DIFFERENTIAL PCI EXPRESS™ JITTER ATTENUATOR

IDT™ / ICS™ PCI EXPRESS™ JITTER ATTENUATOR

11

ICS8741004AG REV. AAUGUST 3, 2007

Recommendations for Unused Input and Output Pins

Inputs:

LVCMOS Control Pins

All control pins have internal pull-ups or pull-downs; additional

resistance is not required but can be added for additional

protection. A 1k

Ω resistor can be used.

Outputs:

Differential Outputs

All unused differential outputs can be left floating. We recommend

that there is no trace attached. Both sides of the differential output

pair should either be left floating or terminated.

LVDS Outputs

All unused LVDS output pairs can be either left floating or

terminated with 100

Ω across. If they are left floating, we

recommend that there is no trace attached.

LVDS Driver Termination

A general LVDS interface is shown in Figure 4. In a 100

Ω

differential transmission line environment, LVDS drivers require a

matched load termination of 100

Ω across near the receiver input.

For a multiple LVDS outputs buffer, if only partial outputs are used,

it is recommended to terminate the unused outputs.

Figure 4. Typical LVDS Driver Termination

3.3V

LVDS Driver

R1

100

Ω

–

+

3.3V

50

Ω

50

Ω

100

Ω Differential Transmission Line