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PIMXRT201VCJM4A Datasheet(PDF) 115 Page - NXP Semiconductors |
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PIMXRT201VCJM4A Datasheet(HTML) 115 Page - NXP Semiconductors |
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115 / 119 page ![]() Rev. 0.2 02/2020 • Updated the SPI NAND Flash in the Section 1.1, Features • Updated the features of RT1062 in the Table 1, Ordering information • Updated the Table 81, Boot through UART1 and removed the Table, Boot through UART2 • Updated the figure and table numbers in the Section 6.2, 12 x 12 mm package information • Updated the Figure 53, "10 x 10 mm BGA, case x package top, bottom, and side Views" and Figure 54, "12 x 12 mm BGA, case x package top, bottom, and side Views" Rev. 0.1 04/2019 • Updated ADC information and removed DAC from Section 1.1, Features and Figure 2, "i.MX RT1060 system block diagram" • Added a new part number in the Table 1, Ordering information • Updated the RT website link in the Section 1.2, Ordering information • Removed tamper detection from the Table 2, i.MX RT1060 modules list • Updated the on-chip termination values of JTAG_TCK and JTAG_MOD in the Table 4, JTAG Controller interface summary • Updated the maximum value of VDD_SOC_IN in the Table 7, Absolute maximum ratings • Changed 528 MHz PLL to System PLL in the Table 16, System PLL’s electrical parameters • Changed 480 MHz PLL to USB PLL in the Table 18, USB PLL’s electrical parameters • Updated the VDD name of supply voltage conditions column in the Table 54, 12-bit ADC operating conditions • Added the Figure 36, "Minimum Sample Time Vs Ras (Cas = 2pF)", Figure 37, "Minimum Sample Time Vs Ras (Cas = 5 pF)", and Figure 38, "Minimum Sample Time Vs Ras (Cas = 10 pF)" in the Section 4.8.2, A/D converter • Updated the Section 4.9.1, LPSPI timing parameters Rev. 0 08/2018 • Initial version Table 88. i.MX RT1060 Data Sheet document revision history (continued) Rev. Number Date Substantive Change(s) |
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