NXP Semiconductors

Data Sheet: Technical Data

Document Number: IMXRT1060CEC

Rev. 4, 04/2024

MIMXRT1061DVL6A

MIMXRT1061DVL6B

MIMXRT1061DVJ6A

MIMXRT1061DVJ6B

MIMXRT1062DVL6A

MIMXRT1062DVL6B

MIMXRT1062DVJ6A

MIMXRT1062DVJ6B

MIMXRT106ADVL6A

MIMXRT106ADVL6B

MIMXRT106FDVL6A

MIMXRT106FDVL6B

MIMXRT106PDVL6A

MIMXRT106PDVL6B

MIMXRT106SDVL6B

MIMXRT106VDVL6B

MIMXRT106DDVL6B

MIMXRT106CDVL6B

Package Information

Plastic Package

196-pin MAPBGA, 10 x 10 mm, 0.65 mm pitch

196-pin MAPBGA, 12 x 12 mm, 0.8 mm pitch

Ordering Information

See Table 1 on page 6

NXP reserves the right to change the production detail specifications as may be required

to permit improvements in the design of its products.

1

i.MX RT1060 Introduction

The i.MX RT1060 is a new processor family featuring

NXP’s advanced implementation of the Arm

Cortex®-M7 core, which operates at speeds up to 600

MHz to provide high CPU performance and best

real-time response.

The i.MX RT1060 processor has 1 MB on-chip RAM.

512 KB can be flexibly configured as TCM or general

purpose on-chip RAM, while the other 512 KB is

general-purpose on-chip RAM. The i.MX RT1060

integrates advanced power management module with

DCDC and LDO that reduces complexity of external

power supply and simplifies power sequencing. The

i.MX RT1060 also provides various memory interfaces,

including SDRAM, RAW NAND FLASH, NOR

FLASH, SD/eMMC, Quad SPI, and a wide range of

other interfaces for connecting peripherals, such as

WLAN, Bluetooth™, GPS, displays, and camera

sensors. The i.MX RT1060 has rich audio and video

features, including LCD display, basic 2D graphics,

camera interface, SPDIF, and I2S audio interface. The

i.MX RT1060 has analog interfaces, such as ADC,

ACMP, and TSC.

i.MX RT1060 Crossover

Processors for Consumer

Products

1. i.MX RT1060 Introduction . . . . . . . . . . . . . . . . . . . . . . . . 1

1.1. Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

1.2. Ordering information . . . . . . . . . . . . . . . . . . . . . . . 6

2. Architectural Overview . . . . . . . . . . . . . . . . . . . . . . . . . 12

2.1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

3. Modules List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3.1. Special signal considerations . . . . . . . . . . . . . . . 20

3.2. Recommended connections for unused analog

interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

4. Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 23

4.1. Chip-Level conditions . . . . . . . . . . . . . . . . . . . . . 23

4.2. System power and clocks . . . . . . . . . . . . . . . . . . 30

4.3. I/O parameters . . . . . . . . . . . . . . . . . . . . . . . . . . 35

4.4. System modules . . . . . . . . . . . . . . . . . . . . . . . . . 42

4.5. External memory interface . . . . . . . . . . . . . . . . . 47

4.6. Display and graphics . . . . . . . . . . . . . . . . . . . . . . 57

4.7. Audio . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

4.8. Analog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

4.9. Communication interfaces . . . . . . . . . . . . . . . . . . 70

4.10. Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83

5. Boot mode configuration . . . . . . . . . . . . . . . . . . . . . . . . 85

5.1. Boot mode configuration pins . . . . . . . . . . . . . . . 85

5.2. Boot device interface allocation . . . . . . . . . . . . . . 85

6. Package information and contact assignments . . . . . . . 90

6.1. 10 x 10 mm package information . . . . . . . . . . . . 90

6.2. 12 x 12 mm package information . . . . . . . . . . . 102

7. Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114