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CY7C1069AV33
Document #: 38-05255 Rev. *F
Page 6 of 9
Write Cycle No. 1 (CE1 Controlled)
[16, 17, 18]
Write Cycle No. 2 (WE Controlled, OE LOW)[16, 17, 18]
Switching Waveforms (continued)
tHD
tSD
tSCE
tSA
tHA
tAW
tPWE
tWC
BW
DATAI/O
ADDRESS
CE
WE
t
tHD
tSD
tSCE
tHA
tAW
tPWE
tWC
DATA I/O
ADDRESS
CE
WE
tSA
tLZWE
tHZWE
Truth Table
CE1
CE2
OE
WE
I/O0–I/O7
Mode
Power
H
X
X
X
High-Z
Power-down
Standby (ISB)
X
L
X
X
High-Z
Power-down
Standby (ISB)
L
H
L
H
Data Out
Read All Bits
Active (ICC)
L
H
X
L
Data In
Write All Bits
Active (ICC)
L
H
H
H
High-Z
Selected, Outputs Disabled
Active (ICC)
Notes:
16. Data I/O is high-impedance if OE = VIH.
17. If CE1 goes HIGH/CE2 LOW simultaneously with WE going HIGH, the output remains in a high–impedance state.
18. CE above is defined as a combination of CE1 and CE2. It is active low.
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