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PM5358 Datasheet(PDF) 1 Page - PMC-Sierra, Inc |
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PM5358 Datasheet(HTML) 1 Page - PMC-Sierra, Inc |
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1 / 2 page ![]() PM5358 Advance Quad Channel OC-12c ATM and POS Physical Layer Device S/UNI®-4x622 PMC-2000331 (A2) PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE © Copyright PMC-Sierra, Inc. 2000 FEATURES • Single chip quad ATM and POS User- Network Interface operating at 622 Mbit/s. • Implements the ATM Forum User Network Interface Specification and the ATM physical layer for Broadband ISDN according to CCITT Recommendation I.432. • Implements the Point-to-Point Protocol (PPP) over SONET/SDH specification according to RFC 2615(1619)/1662 of the PPP Working Group of the Internet Engineering Task Force (IETF). • Processes four bit-serial 622 Mbit/s STS-12c (STM-4-4c) data streams with on-chip clock and data recovery and clock synthesis. • Complies with Bellcore GR-253-CORE jitter tolerance, jitter transfer and intrinsic jitter criteria. • Each channel provides termination for SONET Section, Line and Path overhead or SDH Regenerator Section, Multiplexer Section and High Order Path overhead. • Provides UTOPIA Level 3 32-bit wide System Interface (clocked up to 104 MHz) with parity support for ATM applications. • Provides SATURN POS-PHY Level 3™ 32-bit System Interface (clocked up to 104 MHz) for Packet over SONET (POS), or ATM applications. • Supports line loopback from the line side receive stream to the transmit stream and diagnostic loopback from the line side transmit stream to the line side receive stream interface. • Provides support for automatic protection switching including a bi- directional 4-bit PECL 622 MHz port for external APS with mate device. • Built-in APS cross-connect for internal and external 1+1 and 1:n protection switching. • Provides a standard five signal IEEE 1149.1 JTAG test port for boundary scan board test purposes. • Provides a generic 16-bit microprocessor bus interface for configuration, control, and status monitoring. • Low power 2.5 V CMOS core logic with 3.3 V CMOS/TTL compatible digital inputs and digital outputs. PECL inputs and outputs are 3.3 V compatible. • Industrial temperature range (-40° C to +85° C). • 520 pin SBGA package. • Pin and software compatible with PM5382 S/UNI-16x155. APPLICATIONS • ATM and Multiservice Switches, Routers, and Switch/Routers. • SONET/SDH Add/Drop Multiplexers with data processing capabilities • Uplink Cards. • SONET/SDH ATM/POS Test Equipment. QAVS[2:0] ATP[1:0] QAVD[2:0] TXD[3:0]+/- SD[3:0] REFCLK+/- RXD[3:0]+/- TDREF1, TDREF0 AVD[45:0] SPECLV SDTTL AVS[45:0] C1[3:0], C0[3:0] Path Trace Buffer Section Trace Buffer WAN Synch. Sync Status, BERM Section/ Line DCC Insertion Section/ Line DCC Extraction JTAG TCA/TPA TENB STPA TSOC/TSOP TADR[3:0] TFCLK TPRTY TMOD[1:0] TDAT[31:0] TSX RADR[3:0] RSX RSOC/RSOP RFCLK TEOP RPRTY RMOD[1:0] RDAT[31:0] RENB REOP RERR Rx Line O/H Processor Rx Section O/H Processor Tx Line O/H Processor Tx Section O/H Processor TERR RCA/RVAL Microprocessor Interface External APS Interface Tx Path O/H Processor Tx ATM Cell Processor Tx POS Frame Processor Rx ATM Cell Processor Rx POS Frame Processor Rx Path O/H Processor BLOCK DIAGRAM |
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Similar Description - PM5358 |
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