CY29948
Document #: 38-07288 Rev. *C
Page 3 of 8
Maximum Ratings[2]
Maximum Input Voltage Relative to VSS: ............ VSS – 0.3V
Maximum Input Voltage Relative to VDD: ............. VDD + 0.3V
Storage Temperature: ................................ –65°C to + 150°C
Operating Temperature: ................................ –40°C to +85°C
Maximum ESD protection: .............................................. 2 kV
Maximum Power Supply: ................................................5.5V
Maximum Input Current: ............................................±20 mA
This device contains circuitry to protect the inputs against
damage due to high static voltages or electric field; however,
precautions should be taken to avoid application of any
voltage higher than the maximum rated voltages to this circuit.
For proper operation, Vin and Vout should be constrained to the
range:
VSS < (Vin or Vout) < VDD
Unused inputs must always be tied to an appropriate logic
voltage level (either VSS or VDD).
Notes:
2. Multiple Supplies: The voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.
3. Inputs have pull-up/pull-down resistors that effect input current.
4. The VCMR is the difference from the most positive side of the differential input signal. Normal operation is obtained when the “High” input is within the VCMR range
and the input lies within the VPP specification.
5. Driving series or parallel terminated 50
Ω (or 50Ω to V
DD/2) transmission lines.
DC Parameters VDD = VDDC = 3.3V ±10% or 2.5V ±5%, over the specified temperature range.
Parameter
Description
Conditions
Min.
Typ.
Max.
Unit
VIL
Input Low Voltage
VDD = 3.3V, PECL_CLK single ended
1.49
–
1.825
V
VDD = 2.5V, PECL_CLK single ended
1.10
–
1.45
All other inputs
VSS
–0.8
VIH
Input High Voltage
VDD = 3.3V, PECL_CLK single ended
2.135
–
2.42
V
VDD = 2.5V, PECL_CLK single ended
1.75
–
2.0
All other inputs
2.0
–
VDD
IIL
Input Low Current[3]
–
–
–100
µA
IIH
Input High Current[3]
––
100
VPP
Peak-to-Peak Input Voltage
PECL_CLK
300
–
1000
mV
VCMR
Common Mode Range[4]
PECL_CLK
VDD = 3.3V
VDD – 2.0
–
VDD – 0.6
V
VDD = 2.5V
VDD – 1.2
–
VDD – 0.6
VOL
Output Low Voltage[5]
IOL = 20 mA
–
0.4
V
VOH
Output High Voltage[5]
IOH = –20 mA, VDD = 3.3V
2.5
–
–
V
IOH = –20 mA, VDD = 2.5V
1.8
–
–
IDDQ
Quiescent Supply
Current
–57
mA
IDD
Dynamic Supply
Current
VDD = 3.3V, Outputs @ 100 MHz,
CL = 30 pF
–180
–
mA
VDD = 3.3V, Outputs @ 160 MHz,
CL = 30 pF
–270
–
VDD = 2.5V, Outputs @ 100 MHz,
CL = 30 pF
–125
–
VDD = 2.5V, Outputs @ 160 MHz,
CL = 30 pF
–190
–
Zout
Output Impedance
VDD = 3.3V
12
15
18
Ω
VDD = 2.5V
14
18
22
Cin
Input Capacitance
–
4
–
pF
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