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LB11693JH Datasheet(PDF) 2 Page - Sanyo Semicon Device |
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LB11693JH Datasheet(HTML) 2 Page - Sanyo Semicon Device |
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2 / 12 page  LB11693JH No.A0606-2/12 Allowable Operating Ranges at Ta = 25 °C Parameter Symbol Conditions Ratings Unit Supply voltage range VCC 9.5 to 28 V Constant voltage output current IREG 0 to -30 mA RD output current IRD 0 to 10 mA FG output current IFG 0 to 10 mA Electrical Characteristics at Ta = 25 °C, VCC = VM = 24V Ratings Parameter Symbol Conditions min typ max unit Current drain 1 ICC1 10 13.5 mA Current drain 2 ICC2 When STOP 4.0 5.5 mA [Output Block] Output saturation voltage 1 VOsat1 IO = 0.7A,VO(SINK)+VO(SOURCE) 1.5 2.05 V Output saturation voltage 2 VOsat2 IO = 1.5A,VO(SINK)+VO(SOURCE) 2.2 2.9 V Output leakage current IOleak 100 µA High side diode forward voltage 1 VD1 ID = 0.7A 1.25 1.65 V High side diode forward voltage 2 VD2 ID = 1.5A 1.9 2.5 V [5V Constant Voltage Output] Output voltage VREG IO = -5mA 4.7 5.0 5.3 V Line regulation ∆VREG1 VCC = 9.5 to 28V 30 100 mV Load regulation ∆VREG2 IO = -5 to -20mA 20 100 mV [Hall Amplifier] Input bias current IB(HA) 2 10 µA Hall sensor input sensitivity VHIN Sine wave input 50 350 mVp-p Common-mode input voltage range VICM Differential input 50mVp-p 1.5 VREG-1.0 V Input offset voltage VIOH Design target value* -20 +20 mV [CSD Pin] High-level output voltage VOH(CSD) 2.75 3.0 3.25 V Low-level output voltage VOL(CSD) 0.85 1.0 1.15 V External capacitor charge current ICSD1 -3.3 -2.4 -1.4 µA External capacitor discharge current ICSD2 0.09 0.17 0.23 µA Charge/discharge current ratio RCSD Charge current/discharge current 14 Times [Undervoltage Protection Circuit (LVS Pin)] Operating voltage VSDL 3.6 3.8 4.0 V Release voltage VSDH 4.1 4.3 4.5 V Hysteresis ∆VSD 0.35 0.5 0.65 V [Current Limiter Circuit] Limiter voltage VRF VCC-VM 0.45 0.5 0.55 V [Thermal Shutdown Operation] Thermal shutdown operating temperature TSD Design target value* (junction temperature) 150 170 °C Hysteresis ∆TSD Design target value* (junction temperature) 40 °C [CTL Amplifier] Input offset voltage VIO(CTL) -10 10 mV Input bias current IB(CTL) -1 1 µA Common-mode input voltage range VICM 0 VREG-1.7 V High-level output voltage VOH(CTL) ITOC = -0.2mA VREG-1.2 VREG-0.8 V Low-level output voltage VOL(CTL) ITOC = 0.2mA 0.8 1.05 V Open-loop gain G(CTL) f(CTL) = 1kHz 45 51 dB *: Design target value and no measurement was made. Continued on next page. |
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