PCF2128T datasheet(5/10 Pages) PHILIPS

5 / 10 page

PCF2128_SDS_0

Preliminary [short] data sheet

Rev. 00.03 — 4 June 2007

5 of 10

NXP Semiconductors

PCF2128

Real time clock / calendar

Limiting values

7.1 ESD values

• ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per

JESD22-A115 and 2000 V CDM per JESD22-C101.

• Latch-up testing is done to JEDEC standard JESD78 which exceeds 100 mA.

Application information

• The PCF2128 is a ready to run real time clock; no external quartz is required.

• You can set different configurations in your application depending on the PCF2128

functions you want to use.

• The integration of the quartz crystal in the same package as the RTC has the

following advantages:

– elimination of crystal procurement issues

– elimination of RTC frequency tuning

– no more crystal PCB layout issues.

• You can select the SPI or I2C-bus interface using the IFS pin.

• By connecting a battery to VBAT an uninterruptible power supply is guaranteed.

• You can use the battery backed voltage VOUT to supply an external RAM to retain

RAM data in battery backup mode.

• You can connect PFI through an external voltage divider to VDD to allow extra power

fail detection. If not used, connect PFI to VSS.

• You can connect the timestamp input pin TS to a push button for tamper detection.

Table 4:

Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol

Parameter

Conditions

Min

Max

Unit

VDD

supply voltage

−0.5

+6.5

VBAT

backup battery supply

voltage

−0.5

+6.5

IDD

supply current

−50

+50

input voltage

−0.5

+6.5

output voltage

−0.5

+6.5

input current

−10

+10

output current

−10

+10

Ptot

total power dissipation

300

Tamb

ambient temperature

−40

+85

°C

Tstg

storage temperature

−65

+150

°C

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