VIPER53SP-E datasheet(15/36 Pages) STMICROELECTRONICS

15 / 36 page

VIPer53 - E

Primary regulation configuration example

15/36

Primary regulation configuration example

Figure 18. Off line power supply with auxiliary supply feedback

The schematic on Figure 18 delivers a fixed output voltage by using the internal error

amplifier of the device in a primary feedback configuration. The primary auxiliary winding

provides a voltage to the VDD pin, and is automatically regulated at 15V, due to the internal

error amplifier connected to this pin. The secondary voltage has to be adjusted through the

turn ratio of the transformer between auxiliary and secondary.

The error amplifier of the VIPer53 is a transconductance type: its output is a current

proportional to the difference of voltage between the VDD pin and the internally trimmed 15V

reference (i.e., the error voltage). As the transconductance value is set at a relatively low

value to control the overall loop gain and ensure stability, this current has to be integrated by

a capacitor (C7 in Figure 18). When the steady state operation is reached, this capacitor

blocks any DC current from the COMP pin and imposes a “nil” error voltage. Therefore, the

VDD voltage is accurately regulated to 15V.

This results in a good load regulation, which depends only on transformer coupling and

output diodes impedance. The current mode structure takes care of all incoming voltage

changes, thus providing at the same time an excellent line regulation.

15V

VDD

OSC

DRAIN

SOURCE

COMP

TOVL

VIPer73

C10

AC IN

DC OUT

C11

10nF

VIPER53SP-E Datasheet(PDF) 15 Page - STMicroelectronics