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MB95F136MBSPF Datasheet(PDF) 18 Page - fujitsu semiconductor |
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MB95F136MBSPF Datasheet(HTML) 18 Page - fujitsu semiconductor |
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18 / 64 page  MB95130MB Series 18 ■ BLOCK DIAGRAM F2MC-8FX CPU UART/SIO 1 channel Watch prescaler ROM 32 Kbytes RAM 1 Kbyte LIN-UART 1 channel 8/16-bit PPG 2 channels RST X0/X1 PG2/(X1A)* PG1/(X0A)* P00/INT00 to P07/INT07 (P00/PPG00) (P01/PPG01) (P05/TO00) (P06/TO01) (P12/EC0) PF0/PF1 (P02/SCK) (P03/SOT) (P04/SIN) P00/AN00 to P07/AN07 P10/U10 P11/UO0 P12/UCK0 P14/PPG0 P15/P16 AVCC AVSS MOD, VCC, VSS, C P13/TRG0/ADTG *: Single clock product is a general-purpose port, and dual clock product is a sub clock oscillation pin. Reset control Clock control Watch counter External interrupt 8 channels Port Interrupt control Wild register 8/16-bit compound timer 1 channel Port Other pins 8/10-bit A/D converter 8 channels 16-bit PPG 1 channel |
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