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AUG-17-2004
N-Channel Logic Level Enhancement
Mode Field Effect Transistor
P3055LDG
TO-252 (DPAK)
Lead-Free
NIKO-SEM
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS
SYMBOL
LIMITS
UNITS
Gate-Source Voltage
VGS
±20
V
TC = 25 °C
12
Continuous Drain Current
TC = 100 °C
ID
8
Pulsed Drain Current
1
IDM
45
A
Avalanche Energy
L = 0.1mH
EAS
60
Repetitive Avalanche Energy
2
L = 0.05mH
EAR
3
mJ
TC = 25 °C
48
Power Dissipation
TC = 100 °C
PD
20
W
Operating Junction & Storage Temperature Range
Tj, Tstg
-55 to 150
Lead Temperature (
1/
16” from case for 10 sec.)
TL
275
°C
THERMAL RESISTANCE RATINGS
THERMAL RESISTANCE
SYMBOL
TYPICAL
MAXIMUM
UNITS
Junction-to-Case
RθJC
3
Junction-to-Ambient
RθJA
75
Case-to-Heatsink
RθCS
1
°C / W
1Pulse width limited by maximum junction temperature.
2Duty cycle
≤ 1%
ELECTRICAL CHARACTERISTICS (TC = 25 °C, Unless Otherwise Noted)
LIMITS
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP MAX
UNIT
STATIC
Drain-Source Breakdown Voltage
V(BR)DSS
VGS = 0V, ID = 250µA
25
Gate Threshold Voltage
VGS(th)
VDS = VGS, ID = 250µA
0.8
1.2
2.5
V
Gate-Body Leakage
IGSS
VDS = 0V, VGS = ±20V
±250
nA
VDS = 20V, VGS = 0V
25
Zero Gate Voltage Drain Current
IDSS
VDS = 20V, VGS = 0V, TJ = 125 °C
250
µA
1. GATE
2. DRAIN
3. SOURCE
PRODUCT SUMMARY
V(BR)DSS
RDS(ON)
ID
25
50mΩ
12A
G
D
S
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