Pin Description

Pin Name

I/O

Internal

Connection

Description

A0~A7

I

CMOS IN Pull-high

(HT12A)

Input pins for address A0~A7 setting

These pins can be externally set to VSS or left open

NMOS TRANSMISSION

GATE PROTECTION

DIODE (HT12E)

AD8~AD11

I

NMOS TRANSMISSION

GATE PROTECTION

DIODE (HT12E)

Input pins for address/data AD8~AD11 setting

These pins can be externally set to VSS or left open

D8~D11

I

CMOS IN Pull-high

Input pins for data D8~D11 setting and transmission enable, active

low

These pins should be externally set to VSS or left open (see Note)

DOUT

O

CMOS OUT

Encoder data serial transmission output

L/M

I

CMOS IN Pull-high

Latch/Momentary transmission format selection pin:

Latch: Floating or VDD

Momentary: VSS

TE

I

CMOS IN Pull-high

Transmission enable, active low (see Note)

OSC1

I

OSCILLATOR 1

Oscillator input pin

OSC2

O

OSCILLATOR 1

Oscillator output pin

X1

I

OSCILLATOR 2

455kHz resonator oscillator input

X2

O

OSCILLATOR 2

455kHz resonator oscillator output

VSS

I

¾

Negative power supply, ground

VDD

I

¾

Positive power supply

Note:

D8~D11 are all data input and transmission enable pins of the HT12A.

TE is a transmission enable pin of the HT12E.

Approximate Internal Connections

HT12A/HT12E

Rev. 1.10

3

January 24, 2003

N M O S

T R A N S M I S S I O N

G A T E

C M O S I N

P u l l - h i g h

C M O S O U T

O S C I L L A T O R 1

O S C 2

O S C 1

O S C I L L A T O R 2

X 1

X 2

E N

N M O S T R A N S M I S S I O N G A T E

P R O T E C T I O N D I O D E