SC4602AEVB datasheet(13/18 Pages) SEMTECH

13 / 18 page

 2006 Semtech Corp.

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SC4602A/B

POWER MANAGEMENT

Applications Information (Cont.)

Where:

R = load resistance and

C = C4’s ESR.

The compensation network will have the characteristic

as follows:

COMP

)

(

⋅

Where:

)

(

⋅

)

(

⋅

After the compensation, the converter will have the fol-

lowing loop gain:

COMP

PWM

)

(

)

(

)

(

⋅

Where:

PWM = PWM gain and

M = 1.5V, ramp peak to valley voltage of SC4602A/B.

The design guidelines for the SC4602A/B applications

are as following:

1. Set the loop gain crossover corner frequency

C for

given switching corner frequency

S =2pfs,

2. Place an integrator at the origin to increase DC and

low frequency gains,

3. Select

Z1 and ωZ2 such that they are placed near

O to damp the peaking and the loop gain has a

-20dB/dec rate to go across the 0dB line for

obtaining a wide bandwidth,

4. Cancel the zero from C

4’s ESR by a compensator

pole

P1 (ωP1 = ωESR = 1/( RCC4)),

5. Place a high frequency compensator pole

ωp

2 (ωp2

= pf

s) to get the maximum attenuation of the

switching

ripple and high frequency noise with the adequate

phase lag at

The compensated loop gain will be as given in Figure 4:

-20dB/dec

0dB

ωZ1

ESR

ωo

Loop gain T(s)

Power stage GVD(s)

-40dB/dec

Figure 4. Asymptotic diagrams of power stage and its

loop gain

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