TMUX7612 datasheet(33/54 Pages) TI

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• TA = maximum ambient temperature

• RϴJA = package thermal coefficients

• RON = on resistance

• n = number of channels in parallel

• Limitations on maximum current based on junction temperature from the datasheet

Below is an example using TMUX7612 specifications:

Device maximum TJ=150°C

For this example we assume 20°C of self-heating at a maximum TA=105°C and operating with 4 channels at

once at ±15V. We can assume worst case RON = 2.2Ω. This number is taken from the maximum specified value

at TA = 125°C where TJ=125°C since the specification assumes no self-heating. Using the following equation we

can calculate the maximum thermal limitation.

Similarly, you can calculate the TJ and total power dissipated in these examples with the following equations.

Note there will be some small power dissipated from the supply current consumption of the device, which is

ignored here.

TJ = RθJA×I2×RON×n+TA

(1)

Ptotal=TJ−TARθJA

(2)

Pulse current can be calculated the same way, but using the duty cycle, d. Typically, pulse current is specified at

a 10% duty cycle; however, do not exceed the maximum current provided in the pulse current table even with a

shorter duty cycle.

I= 1d TJ−TA

RθJA×RON×n

(3)

TJ=RθJA× d×I2×RON×n+TA

(4)

8.4 Power Supply Recommendations

The TMUX7612 device operates across a wide supply range of ±4.5 V to ±25V (4.5 V to 50V in single-supply

mode). The device also performs well with asymmetrical supplies such as VDD = 37.5 V and VSS = –12.5 V.

Power-supply bypassing improves noise margin and prevents switching noise propagation from the supply

rails to other components. Good power-supply decoupling is important to achieve optimum performance. For

improved supply noise immunity, use a supply decoupling capacitor ranging from 0.1 μF to 10 μF at both the VDD

and VSS pins to ground. Place the bypass capacitors as close to the power supply pins of the device as possible

using low-impedance connections. TI recommends using multi-layer ceramic chip capacitors (MLCCs) that

offer low equivalent series resistance (ESR) and inductance (ESL) characteristics for power-supply decoupling

purposes. For very sensitive systems, or for systems in harsh noise environments, avoiding the use of vias

for connecting the capacitors to the device pins may offer superior noise immunity. The use of multiple vias

in parallel lowers the overall inductance and is beneficial for connections to ground and power planes. Always

make sure a solid ground (GND) connection is established before supplies are ramped.

8.5 Layout

8.5.1 Layout Guidelines

When a PCB trace turns a corner at a 90° angle, a reflection can occur. A reflection occurs primarily because of

the change of width of the trace. At the apex of the turn, the trace width increases to 1.414 times the width. This

increase upsets the transmission-line characteristics, especially the distributed capacitance and self–inductance

of the trace which results in the reflection. Not all PCB traces can be straight and therefore some traces must

turn corners. Figure 8-5 shows progressively better techniques of rounding corners. Only the last example

(BEST) maintains constant trace width and minimizes reflections.

www.ti.com

TMUX7612

SCDS466A – AUGUST 2023 – REVISED DECEMBER 2024

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