9

 2004 Semtech Corp.

www.semtech.com

POWER MANAGEMENT

SC2688

Component Selection (Cont.)

sider conduction losses to determine FET suitability.

For a 5V in; 2.8V out at 14.2A requirement, typical FET

losses would be:

Using 1.5X Room temp R

e

p

y

t

T

E

FR

)

n

o

(

S

D

m

(

Ω)P

D

)

W

(e

g

a

k

c

a

P

5

2

0

4

3

L

R

I5

19

6

.

k

a

P

3

0

2

2

L

R

I5

.

0

19

1

.

k

a

P

0

1

4

4

i

S0

26

2

.

28

-

0

S

BOTTOM FET - Bottom FET losses are almost entirely

due to conduction. The body diode is forced into conduc-

tion at the beginning and end of the bottom switch con-

duction period, so when the FET turns on and off, there

is very little voltage across it, resulting in low switching

losses. Conduction losses for the FET can be determined

by:

)

1

(

R

I

P

)

on

(

DS

2

O

COND

δ

−

⋅

⋅

=

For the example above:

e

p

y

t

T

E

FR

)

n

o

(

S

D

m

(

Ω)P

D

)

W

(e

g

a

k

c

a

P

5

2

0

4

3

L

R

I5

13

3

.

k

a

P

3

0

2

2

L

R

I5

.

0

13

9

.

k

a

P

0

1

4

4

i

S0

27

7

.

18

-

0

S

Each of the package types has a characteristic thermal

impedance. For the surface mount packages on double

sided FR4, 2 oz printed circuit board material, thermal

SO-8 are readily achievable. The corresponding tempera-

ture rise is detailed below:

(

e

s

i

R

e

r

u

t

a

r

e

p

m

e

T

O

)

C

e

p

y

t

T

E

FT

E

F

p

o

TT

E

F

m

o

t

t

o

B

5

2

0

4

3

L

R

I6

.

7

62

.

3

5

3

0

2

2

L

R

I6

.

7

42

.

7

3

0

1

4

4

i

S8

.

0

8

16

.

1

4

1

It is apparent that single SO-8 Si4410 are not adequate

for this application, but by using parallel pairs in each

position, power dissipation will be approximately halved

and temperature rise reduced by a factor of 4.

INPUT CAPACITORS - since the RMS ripple current in the

input capacitors may be as high as 50% of the output

current, suitable capacitors must be chosen accordingly.

Also, during fast load transients, there may be restrictions

on input di/dt. These restrictions require useable energy

storage within the converter circuitry, either as extra

output capacitance or, more usually, additional input ca-

pacitors. Choosing low ESR input capacitors will help maxi-

mize ripple rating for a given size.

GATE RESISTOR SELECTION - The gate resistors for the

top and bottom switching FETs limit the peak gate current

and hence control the transition time. It is important to

control the off time transition of the top FET, it should be

fast to limit switching losses, but not so fast as to cause

excessive phase node oscillation below ground as this can

lead to current injection in the IC substrate and erratic

behaviour or latchup. The actual value should be deter-

mined in the application, with the final layout and FETs.

SHORT CIRCUIT PROTECTION - LINEARS

The Short circuit feature on the linear controllers is imple-

mented by using the Rds(on) of the FETs. As output cur-

rent increases, the regulation loop maintains the output

voltage by turning the FET on more and more. Eventually,

as the Rds(on) limit is reached, the FET will be unably to

turn on more fully, and output voltage will start to fall.

When the output voltage falls to approximately 40% of

nominal, the LDO controller is latched off, setting output

voltage to 0. Power must be cycled to reset the latch.

To prevent false latching due to capacitor inrush currents

or low supply rails, the current limit latch is initially dis-

abled. It is enabled at a preset time (nominally 2ms) after

both the LDOV and LDOEN pins rise above their lockout

points.

To be most effective, the linear FET Rds(on) should not be

selected artificially low, the FET should be chosen so that,

at maximum required current, it is almost fully turned on.

If, for example, a linear supply of 1.5V at 4A is required

from a 3.3V ± 5% rail, max allowable Rds(on) would be.

Rds(on)max = (0.95*3.3-1.5)/4 » 400m

Ω

To allow for temperature effects 200m

Ω would be a suit-

able room temperature maximum, allowing a peak short

circuit current of approximately 15A for a short time be-

fore shutdown.