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HT82K68A Datasheet(PDF) 13 Page - Holtek Semiconductor Inc |
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HT82K68A Datasheet(HTML) 13 Page - Holtek Semiconductor Inc |
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13 / 39 page  HT82K68A Rev. 1.70 13 December 26, 2005 To enable the counting operation, the timer ON bit (TON; bit 4 of TMRC) should be set to 1. In the case of timer counter OFF condition, writing data to the timer counter preload register will also reload that data to the timer counter. But if the timer counter is turned on, data written to it will only be kept in the timer counter preload register. The timer counter will still operate until overflow occurs. When the timer counter (reading TMR) is read, the clock will be blocked to avoid errors. As clock blocking may results in a counting error, this must be taken into consideration by the programmer. The state of the registers is summarized in the following table: Register Reset (Power On) WDT Time-out (Normal Operation) RESET Reset (Normal Operation) RESET Reset (HALT) WDT Time-out (HALT) TMR xxxx xxxx uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu TMRC 00-0 1--- 00-0 1--- 00-0 1--- 00-0 1--- uu-u u--- Program Counter 000H 000H 000H 000H 000H * MP0 xxxx xxxx uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu MP1 xxxx xxxx uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu ACC xxxx xxxx uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu TBLP xxxx xxxx uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu TBLH -xxx xxxx -uuu uuuu -uuu uuuu -uuu uuuu -uuu uuuu STATUS --00 xxxx --1u uuuu --uu uuuu --01 uuuu --11 uuuu INTC -000 0000 -000 0000 -000 0000 -000 0000 -uuu uuuu WDTS 0000 0111 0000 0111 0000 0111 0000 0111 uuuu uuuu PA 1111 1111 1111 1111 1111 1111 1111 1111 uuuu uuuu PAC 1111 1111 1111 1111 1111 1111 1111 1111 uuuu uuuu PB 1111 1111 1111 1111 1111 1111 1111 1111 uuuu uuuu PBC 1111 1111 1111 1111 1111 1111 1111 1111 uuuu uuuu PC 1111 1111 1111 1111 1111 1111 1111 1111 uuuu uuuu PCC 1111 1111 1111 1111 1111 1111 1111 1111 uuuu uuuu PD 1111 1111 1111 1111 1111 1111 1111 1111 uuuu uuuu PDC 1111 1111 1111 1111 1111 1111 1111 1111 uuuu uuuu PE ---1 1111 ---1 1111 ---1 1111 ---1 1111 ---u uuuu PEC ---1 1111 ---1 1111 ---1 1111 ---1 1111 ---u uuuu Note: ²*² stands for ²warm reset² ²u² stands for ²unchanged² ²x² stands for ²unknown² S y s t e m C l o c k / 4 T M 1 T M 0 T M 1 T M 0 T O N P u l s e W i d t h M e a s u r e m e n t M o d e C o n t r o l T i m e r C o u n t e r P r e l o a d R e g i s t e r T i m e r C o u n t e r D a t a B u s R e l o a d O v e r f l o w t o I n t e r r u p t Timer Counter |
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