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SC473

POWER MANAGEMENT

Pin Descriptions

SC473

Pin Configuration

Pin Description

Pin #

Pin Name

1

VID4

VID most significant bit

2

VID3

3

VID2

4

VID1

5

VID0

VID least significant bit

6

HYS

Core comparator hysteresis - a resistor divider from VREF to AGND on this pin sets the

hysteresis voltage

7

CLSET

Current limit set - a resistor divider from VREF to AGND on this pin sets the OCP threshold

8

VREF

Internal reference voltage (2V) - bypass to AGND with a 1000pF NPO ceramic capacitor

9

AGND

Quiet ground for analog control circuits

10

ERROUT

Error amplifier compensation pin

11

FB-

Remote GND sense - connect to VSS_Sense at the CPU socket

12

SS

Soft-start. The external NPO ceramic capacitor at this pin defines the soft-start ramp

13

FB+

Remote die sense of core voltage - connect to VCC_Sense at the CPU socket

14

CS-

Inverting input to Current-Sense amplifier

15

CS+

Non-inverting input to Current-Sense amplifier

16

RAMP

An external R-C defines the internal slope ramp

17

EN

Enable control pin - active high

18

PWRGD

Power good indicator, active high, open drain output

19

PMON

Power Monitor output

20

V5

Input supply for both control circuits and gate drive. Connect to 5V and decouple with at least

1μF ox X5R ceramic capacitance

21

BG

Output drive for the synchronous MOSFET

22

DRN

Inductor switching node - connect to the junction of the switching and synchronous

MOSEFETs

23

TG

Output drive for the switching MOSFET

24

BST

Bootstrap pin - a capacitor is connected between BST and DRN to develop the floating

voltage for the switching MOSFET

Thermal Pad

Power ground for driver - connect with at least two vias to the system GND plane