Pad Coordinates

Unit: mil

Pad No.

X

Y

Pad No.

X

Y

1

-68.76

72.04

29

61.07

-72.33

2

-68.76

59.71

30

67.70

-72.33

3

-68.76

53.08

31

68.98

-10.41

4

-69.53

39.40

32

68.98

-3.78

5

-69.70

24.82

33

68.98

2.85

6

-69.70

18.19

34

68.98

9.48

7

-69.70

11.56

35

68.98

16.11

8

-69.70

1.36

36

68.98

22.74

9

-69.70

-10.28

37

68.98

29.37

10

-69.70

-23.55

38

68.98

36.00

11

-69.70

-38.93

39

68.98

42.63

12

-69.70

-45.56

40

68.98

49.26

13

-69.70

-56.53

41

68.98

55.89

14

-69.70

-63.83

42

68.98

62.52

15

-69.70

-70.46

43

68.98

69.15

16

-39.57

-71.57

44

13.85

72.04

17

-32.94

-71.57

45

7.22

72.04

18

-20.53

-71.57

46

0.60

72.04

19

-13.90

-71.57

47

-6.03

72.04

20

-1.49

-71.57

48

-12.66

72.04

21

5.14

-71.57

49

-19.30

72.04

22

14.66

-72.33

50

-25.92

72.04

23

21.29

-72.33

51

-32.56

72.04

24

27.92

-72.33

52

-39.19

72.04

25

34.55

-72.33

53

-45.81

72.04

26

41.18

-72.33

54

-52.44

72.04

27

47.81

-72.33

55

-59.08

72.04

28

54.44

-72.33

Pad Description

Pad No.

Pad Name

I/O

Description

1CS

I

Chip selection input with pull-high resistor. When the CS is logic high, the

data and command read from or written to the HT16220 are disabled. The

serial interface circuit is also reset But if the CS is at logic low level and is

input to the CS pad, the data and command transmission between the

host controller and the HT16220 are all enabled.

2RD

I

READ clock input with pull-high resistor. Data in the RAM of the HT16220

are clocked out on the falling edge of the RD signal. The clocked out data

will appear on the data line. The host controller can use the next rising

edge to latch the clocked out data.

3WR

I

WRITE clock input with pull-high resistor. Data on the DATA line are

latched into the HT16220 on the rising edge of the WR signal.

4

DATA

I/O

Serial data input or output with pull-high resistor

5

VSS

¾

Negative power supply, ground

6

VDD

¾

Positive power supply

7

VLCD

I

LCD operating voltage input pad.

8

IRQ

O

Time base or watchdog timer overflow flag, NMOS open drain output.

9, 10

BZ, BZ

O

2kHz or 4kHz tone frequency output pair

11

OSCO

O

Crystal oscillator output pin

12

OSCI

I

Crystal oscillator input pin

13~15

T1~T3

I

Not connected

16~23

COM0~COM7

O

LCD common outputs

24~55

SEG0~SEG31

O

LCD segment outputs

HT16220

Rev. 1.20

3

May 19, 2004