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TC58128AFT Datasheet(PDF) 21 Page - Toshiba Semiconductor

Part # TC58128AFT
Description  128-MBIT (16M 횞 8 BITS) CMOS NAND E2PROM
PDF  33 Pages
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TC58128AFT Datasheet(HTML) 21 Page - Toshiba Semiconductor

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TC58128AFT
2001-05-30
21/33
Auto Page Program
The device carries out an Automatic Page Program operation when it receives a “10H” Program command after
the address and data have been input. The sequence of command, address and data input is shown below.
(Refer to the detailed timing chart.)
Auto Block Erase
The Auto Block Erase operation starts on the rising edge of WE after the Erase Start command “D0H”
which follows the Erase Setup command “60H”. This two-cycle process for Erase operations acts as an ertra layer
of protection from aceidental erasure of data due to external noise. The device automatically executes the Erase
and Verify operations.
Pass
80
10
Data input
0 to 527
70
I/O
Address
input
Data input
command
Program
command
Status Read
command
Fail
BY
/
RY
BY
/
RY
automatically returns to Ready after
completion of the operation.
Figure 7. Auto Page Program operation
The data is transferred (programmed) from the register to the selected
page on the rising edge of WE following input of the “10H” command.
After programming, the programmed data is transferred back to the
register to be automatically verified by the device. If the programming
does not succeed, the Program/Verify operation is repeated by the device
until success is achieved or until the maximum loop number set in the
device is reached.
Data input
Selected
page
Reading & verification
Program
Pass
I/O
Fail
BY
/
RY
60
D0
70
Block Address
input: 2 cycles
Status Read
command
Busy
Erase Start
command



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