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AIS20C80B Datasheet(PDF) 2 Page - Advanced (Shenzhen) Electronics Co.,Ltd |
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AIS20C80B Datasheet(HTML) 2 Page - Advanced (Shenzhen) Electronics Co.,Ltd |
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2 / 6 page ![]() AIS20C60/80 2 / 6 www.advsemi.com March,2013 -Rev.3.02 ADV Electrical Characteristics( Tj = 25°C unless otherwise specified ) Symbol Items Conditions AIS20C60/80 Unit S Blank B IDRM IRRM Peak Forward Reverse Blocking Current VDRM = VRRM, Tj = 25°C Max. 5 uA VDRM = VRRM, Tj = 125°C 2.5 mA VTM Peak On-State Voltage ITM = 28A, tp = 380 μs Max. 1.55 V VGD Q1-Q2-Q3 Non−Trigger Gate Voltage VD = VDRM RL = 3.3 kΩ Tj = 125°C Min. 0.2 V VGT Q1-Q2-Q3 Gate Trigger Voltage VD = 12V ,RL = 33Ω Max. 1.5 V IGT Q1-Q2-Q3 Gate Trigger Current Max. 10 35 50 mA IH Q1-Q2-Q3 Holding Current IT = 0.1A Max. 20 50 75 mA IL Q1-Q3 Latching Current IG = 1.2 IGT Max. 20 80 90 mA Q2 35 90 110 dV/dt Critical Rate of Rise of Off-State Voltage VD = 2/3VDRM gate open Tj = 125°C Min. 500 1000 1500 V/μs (dV/dt)c Critical Rate of Change of Commutating Voltage (dI/dt)c=-8.8A/ms Tj = 125°C Min. 1 15 20 V/μs Rth(j-c) Junction to case (AC) Max. 1.9 °C/W Rth(j-a) Junction to ambient Max. 60 °C/W V A VD RG V A VD RG V A VD RG V A VD RG RL T2+ T2- Q1(T2+G+) Q3(T2-G-) Q2(T2+G-) RL RL G+ G- FIG.1:Triac quadrant are defined and the gate trigger test circuit |
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